Updated: mars 2, 2017

Welcome to the NIOS II Xenomai Project

Motivations

This page collects all informations on how to use Xenomai realtime extension with the Altera NIOS II softcore processor. With Philippe Gerum, maintainer of the Xenomai project, we have made an effort to propose this new port. With codesign, a new difficulty appears with flexibility during codesign generation. This page proposes to give important informations specially to this important part. Our wish is that your experience on Xenomai for NIOS II will be successful!

This work has been done for the RTEL4I project with help of the System@TIC ICT cluster.

Hardware Requirements

You need a board with an Altera FPGA circuit and a system (JTAG) for programming it. We suggest to use:

Altera boards first
Other boards from a third party

Software Requirements

You need the cross GNU C compiler for NIOS II
You need the µClinux distribution for NIOS II
You need the Xenomai extension

Hardware Links

Altera site
Altera NIOS II Processor page
Altera User Guides and Manuals page
Altera Data Sheets page
Altera User Manuals page

Software Links

Main links:

GNU C compiler for NIOS II. Local download
µClinux distribution for NIOS II. Local download
Xenomai port for NIOS II

Howtos

Hardware requirements:

You must in your SoPC builder design add extra timers for Xenomai support.

You must have finally 3timers:

32-bit Timer named hrtimer for Xenomai (clock event for Xenomai).
64-bit Timer named hrclock for Xenomai (clock source for Xenomai).
32-bit Timer named sys_clk_timer for µClinux.

Please respect the name of the timers...

Software requirements:

See the Xenomai on NIOS II Softcore Processor Guide

Ready to use:

Latest ready to use Xenomai Linux kernel for NIOS II

Guides

Xenomai on NIOS II Softcore Processor Guide. Version 1.2. English version
Guide d'utilisation de Xenomai sur processeur softcore NIOS II. Version 1.0. French version

Latency measurement

Latency can be measured with tools provided by Xenomai through cross compilation. The principe is to generate a periodic thread and measures difference between the effectiv period and the theorical period that defines latency.

cyclictest : latency is measured on a period of 10000 µs with a thread of the maximal priority 99:
- # cyclictest -n -p 99 -i 10000
latency : latency is measured on a period of 10000 µs:
- # latency -t2 -p10000
- # latency -t1 -p10000
- # latency -t0 -p10000

For stressing the system, we have used:

ping flooding
- # ping -f @IP
stress tool:
- # stress -c 10 -i 10 &

NIOS II Boards tested and in use with Xenomai

For measuring latencies, boards are stressed by stress tool (# stress -c 10 -i 10 &) and ping flooding (# ping -f @IP).

Board	µClinux kernel version	Xenomai version	Max latency (1)	Max latency (2)	Max latency (3)	Max latency (4)	NIOS II Frequency	Contact	Comments	Xenomai Design
Altera Stratix 1S10 board	2.6.30	2.5.2		107 µs			50 MHz	Patrice Kadionik	04/06/2010 trace	From Altera standard reference design
Altera DE2-70 board	2.6.30	2.5.2		56 µs			100 MHz	Huan Fang	03/30/2010 trace	?
Altera Cyclone III 3C25 board	2.6.30	2.5.2		60 µs			100 MHz	Patrice Kadionik	04/06/2010 trace	From Altera standard_neek_80 reference design
Altera Cyclone III 3C120 board	2.6.30	2.5.2		67 µs			100 MHz	Patrice Kadionik	04/12/2010 trace 04/12/2010 trace	From Altera cycloneIII_3c120_niosII_video reference design From Altera cycloneIII_3c120_niosII_standard reference design
Altera Cyclone III 3C25 board	2.6.30	2.5.2		42 µs			100 MHz	Chtourou Sonda	04/07/2010 trace	?

(1) # cyclictest -n -p 99 -i 10000
(2) # latency -t2 -p 10000
(3) # latency -t1 -p 10000
(4) # latency -t0 -p 10000

Downloads

The following Altera SoPC designs for Xenomai are given as an example without any guaranty and AS IS. You must purchase Altera tools for regenerating files for programming your Altera FPGA of your board.

Xenomai design for Altera Stratix 1S10 board. Based on the standard Altera reference design. For Quartus >= 9.1
Xenomai design for Altera Cyclone III 3C25 board. Based on the standard neek Altera reference design. For Quartus >= 9.1
Xenomai design for Altera Cyclone III 3C120 board. Based on the standard Altera reference design. For Quartus >= 9.1

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