Timing Analyzer report for standard

Fri Apr 21 03:03:56 2006
Version 6.0 Build 176 04/19/2006 SJ Full Version


Table of Contents

Top
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
  6. Clock Setup: 'PLD_CLOCKINPUT'
  7. Clock Setup: 'altera_internal_jtag~TCKUTAP'
  8. Clock Hold: 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
  9. Clock Hold: 'PLD_CLOCKINPUT'
  10. tsu
  11. tco
  12. tpd
  13. th
  14. Ignored Timing Assignments
  15. Timing Analyzer Messages


Legal Notice

Top
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.


Timing Analyzer Summary

Top
Type Slack Required Time Actual Time From To From Clock To Clock Failed Paths
Worst-case tsu N/A None 10.777 ns LCD_data_to_and_from_the_lcd_display[2] std_1s10:inst|cpu:the_cpu|d_readdata_d1[2] -- PLD_CLOCKINPUT 0
Worst-case tco N/A None 12.716 ns std_1s10:inst|cpu:the_cpu|M_alu_result[19] LCD_E_from_the_lcd_display PLD_CLOCKINPUT -- 0
Worst-case tpd N/A None 2.504 ns altera_internal_jtag~TDO altera_reserved_tdo -- -- 0
Worst-case th N/A None 1.617 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7] -- altera_internal_jtag~TCKUTAP 0
Clock Setup: 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0' 3.226 ns 50.00 MHz ( period = 20.000 ns ) 59.62 MHz ( period = 16.774 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0
Clock Setup: 'PLD_CLOCKINPUT' 15.453 ns 50.00 MHz ( period = 20.000 ns ) 219.93 MHz ( period = 4.547 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0
Clock Setup: 'altera_internal_jtag~TCKUTAP' N/A None 120.13 MHz ( period = 8.324 ns ) std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP 0
Clock Hold: 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0' 0.528 ns 50.00 MHz ( period = 20.000 ns ) N/A std_1s10:inst|jtag_uart:the_jtag_uart|r_val std_1s10:inst|jtag_uart:the_jtag_uart|r_val std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0
Clock Hold: 'PLD_CLOCKINPUT' 0.604 ns 50.00 MHz ( period = 20.000 ns ) N/A std_1s10:inst|clock_0:the_clock_0|master_writedata[12] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0
Total number of failed paths               0


Timing Analyzer Settings

Top
Option Setting From To Entity Name
Device Name EP1S10F780C6      
Timing Models Final      
Number of source nodes to report per destination node 10      
Number of destination nodes to report 10      
Number of paths to report 200      
Report Minimum Timing Checks Off      
Use Fast Timing Models Off      
Report IO Paths Separately Off      
Default hold multicycle Same As Multicycle      
Cut paths between unrelated clock domains On      
Cut off read during write signal paths On      
Cut off feedback from I/O pins On      
Report Combined Fast/Slow Timing Off      
Ignore Clock Settings Off      
Analyze latches as synchronous elements On      
Enable Recovery/Removal analysis Off      
Enable Clock Latency Off      
Use TimeQuest Timing Analyzer Off      
Cut Timing Path On * slave_readdata[0] clock_0
Cut Timing Path On * slave_readdata[0]~reg0 clock_0
Cut Timing Path On * slave_readdata[10] clock_0
Cut Timing Path On * slave_readdata[10]~reg0 clock_0
Cut Timing Path On * slave_readdata[11] clock_0
Cut Timing Path On * slave_readdata[11]~reg0 clock_0
Cut Timing Path On * slave_readdata[12] clock_0
Cut Timing Path On * slave_readdata[12]~reg0 clock_0
Cut Timing Path On * slave_readdata[13] clock_0
Cut Timing Path On * slave_readdata[13]~reg0 clock_0
Cut Timing Path On * slave_readdata[14] clock_0
Cut Timing Path On * slave_readdata[14]~reg0 clock_0
Cut Timing Path On * slave_readdata[15] clock_0
Cut Timing Path On * slave_readdata[15]~reg0 clock_0
Cut Timing Path On * slave_readdata[1] clock_0
Cut Timing Path On * slave_readdata[1]~reg0 clock_0
Cut Timing Path On * slave_readdata[2] clock_0
Cut Timing Path On * slave_readdata[2]~reg0 clock_0
Cut Timing Path On * slave_readdata[3] clock_0
Cut Timing Path On * slave_readdata[3]~reg0 clock_0
Cut Timing Path On * slave_readdata[4] clock_0
Cut Timing Path On * slave_readdata[4]~reg0 clock_0
Cut Timing Path On * slave_readdata[5] clock_0
Cut Timing Path On * slave_readdata[5]~reg0 clock_0
Cut Timing Path On * slave_readdata[6] clock_0
Cut Timing Path On * slave_readdata[6]~reg0 clock_0
Cut Timing Path On * slave_readdata[7] clock_0
Cut Timing Path On * slave_readdata[7]~reg0 clock_0
Cut Timing Path On * slave_readdata[8] clock_0
Cut Timing Path On * slave_readdata[8]~reg0 clock_0
Cut Timing Path On * slave_readdata[9] clock_0
Cut Timing Path On * slave_readdata[9]~reg0 clock_0
Cut Timing Path On slave_nativeaddress_d1[0] * clock_0
Cut Timing Path On slave_nativeaddress_d1[1] * clock_0
Cut Timing Path On slave_nativeaddress_d1[2] * clock_0
Cut Timing Path On slave_writedata_d1[0] * clock_0
Cut Timing Path On slave_writedata_d1[10] * clock_0
Cut Timing Path On slave_writedata_d1[11] * clock_0
Cut Timing Path On slave_writedata_d1[12] * clock_0
Cut Timing Path On slave_writedata_d1[13] * clock_0
Cut Timing Path On slave_writedata_d1[14] * clock_0
Cut Timing Path On slave_writedata_d1[15] * clock_0
Cut Timing Path On slave_writedata_d1[1] * clock_0
Cut Timing Path On slave_writedata_d1[2] * clock_0
Cut Timing Path On slave_writedata_d1[3] * clock_0
Cut Timing Path On slave_writedata_d1[4] * clock_0
Cut Timing Path On slave_writedata_d1[5] * clock_0
Cut Timing Path On slave_writedata_d1[6] * clock_0
Cut Timing Path On slave_writedata_d1[7] * clock_0
Cut Timing Path On slave_writedata_d1[8] * clock_0
Cut Timing Path On slave_writedata_d1[9] * clock_0
Maximum Delay 100ns   data_in_d1 clock_0_master_read_done_sync_module
Maximum Delay 100ns   data_in_d1 clock_0_master_write_done_sync_module
Maximum Delay 100ns   data_in_d1 clock_0_slave_read_request_sync_module
Maximum Delay 100ns   data_in_d1 clock_0_slave_write_request_sync_module
Maximum Delay 100ns   data_in_d1 std_1s10_reset_clk_domain_synch_module
Maximum Delay 100ns   data_in_d1 std_1s10_reset_sys_clk_domain_synch_module


Clock Settings Summary

Top
Clock Node Name Clock Setting Name Type Fmax Requirement Early Latency Late Latency Based on Multiply Base Fmax by Divide Base Fmax by Offset Phase offset
std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0   PLL output 50.0 MHz 0.000 ns 0.000 ns PLD_CLOCKINPUT 1 1 -1.561 ns  
std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_extclk0   PLL output 50.0 MHz 0.000 ns 0.000 ns PLD_CLOCKINPUT 1 1 -5.061 ns  
PLD_CLOCKINPUT   User Pin 50.0 MHz 0.000 ns 0.000 ns -- N/A N/A N/A  
altera_internal_jtag~TCKUTAP   User Pin None 0.000 ns 0.000 ns -- N/A N/A N/A  
altera_internal_jtag~UPDATEUSER   User Pin None 0.000 ns 0.000 ns -- N/A N/A N/A  


Clock Setup: 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'

Top
Slack Actual fmax (period) From To From Clock To Clock Required Setup Relationship Required Longest P2P Time Actual Longest P2P Time
3.226 ns 59.62 MHz ( period = 16.774 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 16.150 ns
3.295 ns 59.86 MHz ( period = 16.705 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[58] std_1s10:inst|sdram:the_sdram|m_addr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.461 ns 16.166 ns
3.416 ns 60.30 MHz ( period = 16.584 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.960 ns
3.417 ns 60.30 MHz ( period = 16.583 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 16.039 ns
3.422 ns 60.32 MHz ( period = 16.578 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[51] std_1s10:inst|sdram:the_sdram|m_addr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.467 ns 16.045 ns
3.425 ns 60.33 MHz ( period = 16.575 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.951 ns
3.434 ns 60.36 MHz ( period = 16.566 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.394 ns 15.960 ns
3.487 ns 60.56 MHz ( period = 16.513 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.889 ns
3.541 ns 60.76 MHz ( period = 16.459 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[58] std_1s10:inst|sdram:the_sdram|m_addr[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.461 ns 15.920 ns
3.546 ns 60.78 MHz ( period = 16.454 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.783 ns
3.577 ns 60.89 MHz ( period = 16.423 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.879 ns
3.580 ns 60.90 MHz ( period = 16.420 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.876 ns
3.600 ns 60.98 MHz ( period = 16.400 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.776 ns
3.607 ns 61.00 MHz ( period = 16.393 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.849 ns
3.616 ns 61.04 MHz ( period = 16.384 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.840 ns
3.619 ns 61.05 MHz ( period = 16.381 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.757 ns
3.625 ns 61.07 MHz ( period = 16.375 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.474 ns 15.849 ns
3.634 ns 61.10 MHz ( period = 16.366 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[45] std_1s10:inst|sdram:the_sdram|m_addr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.475 ns 15.841 ns
3.668 ns 61.23 MHz ( period = 16.332 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[51] std_1s10:inst|sdram:the_sdram|m_addr[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.467 ns 15.799 ns
3.678 ns 61.27 MHz ( period = 16.322 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.778 ns
3.682 ns 61.28 MHz ( period = 16.318 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.694 ns
3.685 ns 61.29 MHz ( period = 16.315 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.644 ns
3.706 ns 61.37 MHz ( period = 16.294 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.670 ns
3.736 ns 61.49 MHz ( period = 16.264 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.593 ns
3.745 ns 61.52 MHz ( period = 16.255 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.584 ns
3.747 ns 61.53 MHz ( period = 16.253 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|rd_address std_1s10:inst|sdram:the_sdram|m_addr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.446 ns 15.699 ns
3.754 ns 61.55 MHz ( period = 16.246 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.347 ns 15.593 ns
3.767 ns 61.60 MHz ( period = 16.233 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.689 ns
3.770 ns 61.61 MHz ( period = 16.230 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.559 ns
3.770 ns 61.61 MHz ( period = 16.230 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.686 ns
3.776 ns 61.64 MHz ( period = 16.224 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.680 ns
3.779 ns 61.65 MHz ( period = 16.221 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.677 ns
3.785 ns 61.67 MHz ( period = 16.215 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.474 ns 15.689 ns
3.788 ns 61.68 MHz ( period = 16.212 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.474 ns 15.686 ns
3.791 ns 61.69 MHz ( period = 16.209 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.665 ns
3.796 ns 61.71 MHz ( period = 16.204 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.822 ns 16.026 ns
3.807 ns 61.76 MHz ( period = 16.193 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.522 ns
3.809 ns 61.76 MHz ( period = 16.191 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.567 ns
3.817 ns 61.79 MHz ( period = 16.183 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_data_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 16.011 ns
3.818 ns 61.80 MHz ( period = 16.182 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.558 ns
3.819 ns 61.80 MHz ( period = 16.181 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.510 ns
3.827 ns 61.83 MHz ( period = 16.173 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.394 ns 15.567 ns
3.833 ns 61.85 MHz ( period = 16.167 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.543 ns
3.838 ns 61.87 MHz ( period = 16.162 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.618 ns
3.841 ns 61.89 MHz ( period = 16.159 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.615 ns
3.852 ns 61.93 MHz ( period = 16.148 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.477 ns
3.854 ns 61.93 MHz ( period = 16.146 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.522 ns
3.866 ns 61.98 MHz ( period = 16.134 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.962 ns
3.873 ns 62.01 MHz ( period = 16.127 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.583 ns
3.875 ns 62.02 MHz ( period = 16.125 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.454 ns
3.880 ns 62.03 MHz ( period = 16.120 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[45] std_1s10:inst|sdram:the_sdram|m_addr[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.475 ns 15.595 ns
3.880 ns 62.03 MHz ( period = 16.120 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.496 ns
3.884 ns 62.05 MHz ( period = 16.116 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.445 ns
3.893 ns 62.08 MHz ( period = 16.107 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.347 ns 15.454 ns
3.897 ns 62.10 MHz ( period = 16.103 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.559 ns
3.903 ns 62.12 MHz ( period = 16.097 ns ) std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_ext_ram_s1 std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.368 ns 15.465 ns
3.920 ns 62.19 MHz ( period = 16.080 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.409 ns
3.922 ns 62.20 MHz ( period = 16.078 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[9] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.454 ns
3.943 ns 62.28 MHz ( period = 16.057 ns ) std_1s10:inst|cpu:the_cpu|internal_d_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.384 ns 15.441 ns
3.946 ns 62.29 MHz ( period = 16.054 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.383 ns
3.946 ns 62.29 MHz ( period = 16.054 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[8] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.430 ns
3.951 ns 62.31 MHz ( period = 16.049 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.505 ns
3.954 ns 62.32 MHz ( period = 16.046 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.502 ns
3.954 ns 62.32 MHz ( period = 16.046 ns ) std_1s10:inst|cpu:the_cpu|internal_d_write std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.384 ns 15.430 ns
3.960 ns 62.34 MHz ( period = 16.040 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.369 ns
3.969 ns 62.38 MHz ( period = 16.031 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.360 ns
3.978 ns 62.41 MHz ( period = 16.022 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.347 ns 15.369 ns
3.986 ns 62.45 MHz ( period = 16.014 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.822 ns 15.836 ns
3.993 ns 62.47 MHz ( period = 16.007 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|rd_address std_1s10:inst|sdram:the_sdram|m_addr[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.446 ns 15.453 ns
3.993 ns 62.47 MHz ( period = 16.007 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.383 ns
3.995 ns 62.48 MHz ( period = 16.005 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.822 ns 15.827 ns
4.002 ns 62.51 MHz ( period = 15.998 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.327 ns
4.004 ns 62.52 MHz ( period = 15.996 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.840 ns 15.836 ns
4.007 ns 62.53 MHz ( period = 15.993 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_data_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.821 ns
4.009 ns 62.54 MHz ( period = 15.991 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.320 ns
4.010 ns 62.54 MHz ( period = 15.990 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_7 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.413 ns
4.015 ns 62.56 MHz ( period = 15.985 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[52] std_1s10:inst|sdram:the_sdram|m_addr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.467 ns 15.452 ns
4.016 ns 62.56 MHz ( period = 15.984 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_data_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.812 ns
4.018 ns 62.57 MHz ( period = 15.982 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.311 ns
4.023 ns 62.59 MHz ( period = 15.977 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.353 ns
4.023 ns 62.59 MHz ( period = 15.977 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_5 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.400 ns
4.023 ns 62.59 MHz ( period = 15.977 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_6 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.400 ns
4.023 ns 62.59 MHz ( period = 15.977 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_4 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.400 ns
4.025 ns 62.60 MHz ( period = 15.975 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_data_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.846 ns 15.821 ns
4.026 ns 62.60 MHz ( period = 15.974 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.303 ns
4.027 ns 62.61 MHz ( period = 15.973 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.347 ns 15.320 ns
4.031 ns 62.62 MHz ( period = 15.969 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.298 ns
4.032 ns 62.63 MHz ( period = 15.968 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.344 ns
4.033 ns 62.63 MHz ( period = 15.967 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.423 ns
4.034 ns 62.63 MHz ( period = 15.966 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[44] std_1s10:inst|sdram:the_sdram|m_addr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.461 ns 15.427 ns
4.036 ns 62.64 MHz ( period = 15.964 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.420 ns
4.041 ns 62.66 MHz ( period = 15.959 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.394 ns 15.353 ns
4.042 ns 62.66 MHz ( period = 15.958 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.287 ns
4.044 ns 62.67 MHz ( period = 15.956 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.332 ns
4.051 ns 62.70 MHz ( period = 15.949 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.278 ns
4.053 ns 62.71 MHz ( period = 15.947 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.323 ns
4.056 ns 62.72 MHz ( period = 15.944 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.772 ns
4.057 ns 62.72 MHz ( period = 15.943 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.399 ns
4.057 ns 62.72 MHz ( period = 15.943 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.822 ns 15.765 ns
4.059 ns 62.73 MHz ( period = 15.941 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.270 ns
4.060 ns 62.74 MHz ( period = 15.940 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.347 ns 15.287 ns
4.060 ns 62.74 MHz ( period = 15.940 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.396 ns
4.062 ns 62.74 MHz ( period = 15.938 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.394 ns 15.332 ns
4.065 ns 62.75 MHz ( period = 15.935 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.763 ns
4.074 ns 62.79 MHz ( period = 15.926 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.846 ns 15.772 ns
4.075 ns 62.79 MHz ( period = 15.925 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.301 ns
4.078 ns 62.81 MHz ( period = 15.922 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_data_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.750 ns
4.079 ns 62.81 MHz ( period = 15.921 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.250 ns
4.080 ns 62.81 MHz ( period = 15.920 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.249 ns
4.080 ns 62.81 MHz ( period = 15.920 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.296 ns
4.084 ns 62.83 MHz ( period = 15.916 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_27 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.292 ns
4.084 ns 62.83 MHz ( period = 15.916 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_28 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.292 ns
4.087 ns 62.84 MHz ( period = 15.913 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[15] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.242 ns
4.094 ns 62.87 MHz ( period = 15.906 ns ) std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_ext_ram_s1 std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.448 ns 15.354 ns
4.094 ns 62.87 MHz ( period = 15.906 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.282 ns
4.099 ns 62.89 MHz ( period = 15.901 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.277 ns
4.104 ns 62.91 MHz ( period = 15.896 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_26 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.272 ns
4.104 ns 62.91 MHz ( period = 15.896 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_25 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.272 ns
4.104 ns 62.91 MHz ( period = 15.896 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_3 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.272 ns
4.111 ns 62.94 MHz ( period = 15.889 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[58] std_1s10:inst|sdram:the_sdram|m_addr[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.461 ns 15.350 ns
4.113 ns 62.94 MHz ( period = 15.887 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.216 ns
4.113 ns 62.94 MHz ( period = 15.887 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[9] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.343 ns
4.115 ns 62.95 MHz ( period = 15.885 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.261 ns
4.127 ns 63.00 MHz ( period = 15.873 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.701 ns
4.130 ns 63.01 MHz ( period = 15.870 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.246 ns
4.130 ns 63.01 MHz ( period = 15.870 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.246 ns
4.130 ns 63.01 MHz ( period = 15.870 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_24 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.246 ns
4.130 ns 63.01 MHz ( period = 15.870 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_23 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.246 ns
4.130 ns 63.01 MHz ( period = 15.870 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_2 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.246 ns
4.134 ns 63.03 MHz ( period = 15.866 ns ) std_1s10:inst|cpu:the_cpu|internal_d_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.464 ns 15.330 ns
4.135 ns 63.03 MHz ( period = 15.865 ns ) std_1s10:inst|sdram:the_sdram|active_addr[11] std_1s10:inst|sdram:the_sdram|m_addr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.397 ns 15.262 ns
4.137 ns 63.04 MHz ( period = 15.863 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[8] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.319 ns
4.141 ns 63.06 MHz ( period = 15.859 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.188 ns
4.144 ns 63.07 MHz ( period = 15.856 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.185 ns
4.145 ns 63.07 MHz ( period = 15.855 ns ) std_1s10:inst|cpu:the_cpu|internal_d_write std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.464 ns 15.319 ns
4.165 ns 63.15 MHz ( period = 15.835 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.164 ns
4.166 ns 63.16 MHz ( period = 15.834 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_16 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.210 ns
4.166 ns 63.16 MHz ( period = 15.834 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_17 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.210 ns
4.166 ns 63.16 MHz ( period = 15.834 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_15 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.210 ns
4.166 ns 63.16 MHz ( period = 15.834 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_19 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.210 ns
4.166 ns 63.16 MHz ( period = 15.834 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_18 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.210 ns
4.170 ns 63.17 MHz ( period = 15.830 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.822 ns 15.652 ns
4.180 ns 63.21 MHz ( period = 15.820 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.149 ns
4.191 ns 63.26 MHz ( period = 15.809 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_data_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.637 ns
4.192 ns 63.26 MHz ( period = 15.808 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_31 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.184 ns
4.193 ns 63.26 MHz ( period = 15.807 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.136 ns
4.200 ns 63.29 MHz ( period = 15.800 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_7 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.223 ns
4.207 ns 63.32 MHz ( period = 15.793 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.169 ns
4.209 ns 63.33 MHz ( period = 15.791 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_7 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.214 ns
4.213 ns 63.34 MHz ( period = 15.787 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_5 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.210 ns
4.213 ns 63.34 MHz ( period = 15.787 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_6 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.210 ns
4.213 ns 63.34 MHz ( period = 15.787 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_4 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.210 ns
4.218 ns 63.36 MHz ( period = 15.782 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_7 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.441 ns 15.223 ns
4.222 ns 63.38 MHz ( period = 15.778 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_5 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.201 ns
4.222 ns 63.38 MHz ( period = 15.778 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_6 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.201 ns
4.222 ns 63.38 MHz ( period = 15.778 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_4 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.201 ns
4.223 ns 63.38 MHz ( period = 15.777 ns ) std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_ext_ram_s1 std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.321 ns 15.098 ns
4.226 ns 63.40 MHz ( period = 15.774 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.103 ns
4.226 ns 63.40 MHz ( period = 15.774 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.103 ns
4.228 ns 63.40 MHz ( period = 15.772 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.148 ns
4.231 ns 63.42 MHz ( period = 15.769 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_5 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.441 ns 15.210 ns
4.231 ns 63.42 MHz ( period = 15.769 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_6 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.441 ns 15.210 ns
4.231 ns 63.42 MHz ( period = 15.769 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_4 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.441 ns 15.210 ns
4.238 ns 63.44 MHz ( period = 15.762 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[51] std_1s10:inst|sdram:the_sdram|m_addr[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.467 ns 15.229 ns
4.240 ns 63.45 MHz ( period = 15.760 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.588 ns
4.242 ns 63.46 MHz ( period = 15.758 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[9] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.087 ns
4.250 ns 63.49 MHz ( period = 15.750 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.079 ns
4.252 ns 63.50 MHz ( period = 15.748 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.822 ns 15.570 ns
4.254 ns 63.51 MHz ( period = 15.746 ns ) std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_ext_ram_s1 std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.448 ns 15.194 ns
4.257 ns 63.52 MHz ( period = 15.743 ns ) std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_instruction_master_granted_slave_ext_ram_s1 std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.448 ns 15.191 ns
4.259 ns 63.53 MHz ( period = 15.741 ns ) std_1s10:inst|cpu:the_cpu|M_alu_result[19] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.433 ns 15.174 ns
4.261 ns 63.54 MHz ( period = 15.739 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[52] std_1s10:inst|sdram:the_sdram|m_addr[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.467 ns 15.206 ns
4.263 ns 63.54 MHz ( period = 15.737 ns ) std_1s10:inst|cpu:the_cpu|internal_d_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.337 ns 15.074 ns
4.266 ns 63.56 MHz ( period = 15.734 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[8] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.063 ns
4.269 ns 63.57 MHz ( period = 15.731 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.060 ns
4.270 ns 63.57 MHz ( period = 15.730 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.106 ns
4.271 ns 63.58 MHz ( period = 15.729 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_7 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.152 ns
4.273 ns 63.58 MHz ( period = 15.727 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[9] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.183 ns
4.273 ns 63.58 MHz ( period = 15.727 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|last_cycle_cpu_data_master_granted_slave_lan91c111_s1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.828 ns 15.555 ns
4.274 ns 63.59 MHz ( period = 15.726 ns ) std_1s10:inst|cpu:the_cpu|internal_d_write std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.337 ns 15.063 ns
4.274 ns 63.59 MHz ( period = 15.726 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_27 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.102 ns
4.274 ns 63.59 MHz ( period = 15.726 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_28 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.102 ns
4.275 ns 63.59 MHz ( period = 15.725 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.054 ns
4.276 ns 63.60 MHz ( period = 15.724 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[9] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.456 ns 15.180 ns
4.276 ns 63.60 MHz ( period = 15.724 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_avalon_slave_arb_addend[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.822 ns 15.546 ns
4.277 ns 63.60 MHz ( period = 15.723 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[15] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.052 ns
4.278 ns 63.61 MHz ( period = 15.722 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.051 ns
4.279 ns 63.61 MHz ( period = 15.721 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.097 ns
4.280 ns 63.61 MHz ( period = 15.720 ns ) std_1s10:inst|sdram:the_sdram|sdram_input_efifo_module:the_sdram_input_efifo_module|entry_1[44] std_1s10:inst|sdram:the_sdram|m_addr[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.461 ns 15.181 ns
4.283 ns 63.63 MHz ( period = 15.717 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_27 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.093 ns
4.283 ns 63.63 MHz ( period = 15.717 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_28 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.093 ns
4.284 ns 63.63 MHz ( period = 15.716 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[21] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.045 ns
4.284 ns 63.63 MHz ( period = 15.716 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_5 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.139 ns
4.284 ns 63.63 MHz ( period = 15.716 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_6 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.139 ns
4.284 ns 63.63 MHz ( period = 15.716 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_4 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.423 ns 15.139 ns
4.286 ns 63.64 MHz ( period = 15.714 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ext_ram_bus_address[15] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.329 ns 15.043 ns
4.287 ns 63.64 MHz ( period = 15.713 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.347 ns 15.060 ns
4.288 ns 63.65 MHz ( period = 15.712 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.394 ns 15.106 ns
4.289 ns 63.65 MHz ( period = 15.711 ns ) std_1s10:inst|cpu:the_cpu|ic_fill_tag[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.376 ns 15.087 ns
4.292 ns 63.66 MHz ( period = 15.708 ns ) std_1s10:inst|cpu:the_cpu|internal_i_read std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_in_a_write_cycle~_Duplicate_27 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 20.000 ns 19.394 ns 15.102 ns
Timing analysis restricted to 200 rows. To change the limit use Settings (Assignments menu)              


Clock Setup: 'PLD_CLOCKINPUT'

Top
Slack Actual fmax (period) From To From Clock To Clock Required Setup Relationship Required Longest P2P Time Actual Longest P2P Time
15.453 ns 219.93 MHz ( period = 4.547 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.811 ns 4.358 ns
16.050 ns 253.16 MHz ( period = 3.950 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 3.764 ns
16.148 ns 259.61 MHz ( period = 3.852 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 3.666 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.187 ns 262.26 MHz ( period = 3.813 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.772 ns
16.233 ns 265.46 MHz ( period = 3.767 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 3.581 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.338 ns 273.07 MHz ( period = 3.662 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.959 ns 3.621 ns
16.380 ns 276.24 MHz ( period = 3.620 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.947 ns 3.567 ns
16.414 ns 278.86 MHz ( period = 3.586 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.953 ns 3.539 ns
16.414 ns 278.86 MHz ( period = 3.586 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.953 ns 3.539 ns
16.426 ns 279.80 MHz ( period = 3.574 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 3.529 ns
16.531 ns 288.27 MHz ( period = 3.469 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.947 ns 3.416 ns
16.565 ns 291.12 MHz ( period = 3.435 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.953 ns 3.388 ns
16.565 ns 291.12 MHz ( period = 3.435 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.953 ns 3.388 ns
16.577 ns 292.14 MHz ( period = 3.423 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 3.378 ns
16.654 ns 298.86 MHz ( period = 3.346 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 3.304 ns
16.743 ns 307.03 MHz ( period = 3.257 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.817 ns 3.074 ns
16.804 ns 312.89 MHz ( period = 3.196 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 3.010 ns
16.805 ns 312.99 MHz ( period = 3.195 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 3.153 ns
16.975 ns 330.58 MHz ( period = 3.025 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 2.983 ns
17.093 ns 344.00 MHz ( period = 2.907 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.817 ns 2.724 ns
17.126 ns 347.95 MHz ( period = 2.874 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 2.832 ns
17.129 ns 348.31 MHz ( period = 2.871 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 2.826 ns
17.182 ns 354.86 MHz ( period = 2.818 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 2.776 ns
17.182 ns 354.86 MHz ( period = 2.818 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 2.776 ns
17.216 ns 359.20 MHz ( period = 2.784 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.740 ns
17.216 ns 359.20 MHz ( period = 2.784 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.740 ns
17.216 ns 359.20 MHz ( period = 2.784 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.740 ns
17.216 ns 359.20 MHz ( period = 2.784 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.740 ns
17.216 ns 359.20 MHz ( period = 2.784 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.740 ns
17.333 ns 374.95 MHz ( period = 2.667 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 2.625 ns
17.333 ns 374.95 MHz ( period = 2.667 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.958 ns 2.625 ns
17.352 ns 377.64 MHz ( period = 2.648 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.604 ns
17.352 ns 377.64 MHz ( period = 2.648 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.604 ns
17.352 ns 377.64 MHz ( period = 2.648 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.604 ns
17.352 ns 377.64 MHz ( period = 2.648 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.604 ns
17.352 ns 377.64 MHz ( period = 2.648 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.604 ns
17.399 ns 384.47 MHz ( period = 2.601 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.811 ns 2.412 ns
17.558 ns 409.50 MHz ( period = 2.442 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.952 ns 2.394 ns
17.592 ns 415.28 MHz ( period = 2.408 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.364 ns
17.592 ns 415.28 MHz ( period = 2.408 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.364 ns
17.592 ns 415.28 MHz ( period = 2.408 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.364 ns
17.592 ns 415.28 MHz ( period = 2.408 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.364 ns
17.592 ns 415.28 MHz ( period = 2.408 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.364 ns
17.615 ns 419.29 MHz ( period = 2.385 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.199 ns
17.625 ns 421.05 MHz ( period = 2.375 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.189 ns
17.633 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_writedata[3] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.679 ns 2.046 ns
17.666 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.148 ns
17.666 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.148 ns
17.666 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.148 ns
17.666 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.148 ns
17.666 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.148 ns
17.763 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.811 ns 2.048 ns
17.771 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.811 ns 2.040 ns
17.782 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.817 ns 2.035 ns
17.794 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.020 ns
17.802 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.012 ns
17.802 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.012 ns
17.802 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.012 ns
17.802 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.012 ns
17.802 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.012 ns
17.804 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 2.010 ns
17.805 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[10] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.808 ns 2.003 ns
17.806 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.817 ns 2.011 ns
17.814 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.142 ns
17.814 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.142 ns
17.814 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.142 ns
17.814 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.142 ns
17.814 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 2.142 ns
17.840 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.974 ns
17.840 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.974 ns
17.840 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.974 ns
17.840 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.974 ns
17.840 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.974 ns
17.840 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.974 ns
17.865 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.944 ns 2.079 ns
17.868 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_writedata[15] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.721 ns 1.853 ns
17.868 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.946 ns
17.898 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.916 ns
17.903 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.950 ns 2.047 ns
17.904 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.950 ns 2.046 ns
17.935 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.811 ns 1.876 ns
17.945 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 2.010 ns
17.946 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[13] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.810 ns 1.864 ns
17.946 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 2.009 ns
17.961 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.853 ns
17.976 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.838 ns
17.976 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.838 ns
17.976 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.838 ns
17.976 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.838 ns
17.976 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.838 ns
17.976 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.838 ns
18.016 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[2] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 1.939 ns
18.042 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.772 ns
18.042 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.772 ns
18.042 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.772 ns
18.042 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.772 ns
18.042 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.772 ns
18.047 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.767 ns
18.096 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.860 ns
18.097 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.859 ns
18.098 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.858 ns
18.105 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.851 ns
18.120 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.694 ns
18.145 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[5] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.944 ns 1.799 ns
18.145 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.669 ns
18.149 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 1.806 ns
18.174 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[11] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.808 ns 1.634 ns
18.182 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.632 ns
18.195 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.817 ns 1.622 ns
18.204 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.752 ns
18.206 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.750 ns
18.212 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.744 ns
18.215 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.741 ns
18.216 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.598 ns
18.216 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.598 ns
18.216 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.598 ns
18.216 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.598 ns
18.216 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.598 ns
18.216 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.598 ns
18.244 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.570 ns
18.251 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[7] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 1.704 ns
18.259 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.555 ns
18.264 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.550 ns
18.264 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.550 ns
18.264 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.550 ns
18.264 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.550 ns
18.264 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.550 ns
18.266 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[4] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 1.689 ns
18.279 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.535 ns
18.297 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_writedata[4] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.792 ns 1.495 ns
18.306 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.508 ns
18.317 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[4] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.497 ns
18.321 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.493 ns
18.328 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1 PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.811 ns 1.483 ns
18.331 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.483 ns
18.341 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.473 ns
18.371 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.443 ns
18.393 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.421 ns
18.395 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_writedata[14] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.811 ns 1.416 ns
18.403 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.411 ns
18.407 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_writedata[2] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.824 ns 1.417 ns
18.416 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[8] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.540 ns
18.419 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.537 ns
18.423 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[6] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.533 ns
18.438 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.376 ns
18.438 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.376 ns
18.438 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.376 ns
18.438 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.376 ns
18.438 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.376 ns
18.438 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.376 ns
18.455 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.359 ns
18.458 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|master_writedata[7] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.817 ns 1.359 ns
18.465 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.349 ns
18.491 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.800 ns 1.309 ns
18.500 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.314 ns
18.519 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.295 ns
18.523 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.291 ns
18.536 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[15] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.420 ns
18.540 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.955 ns 1.415 ns
18.550 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[14] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.406 ns
18.558 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[3] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.956 ns 1.398 ns
18.586 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.228 ns
18.620 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.194 ns
18.624 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.190 ns
18.624 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.190 ns
18.624 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.190 ns
18.624 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.190 ns
18.624 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.190 ns
18.671 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.143 ns
18.761 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.053 ns
18.763 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.051 ns
18.770 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[4] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.044 ns
18.771 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.043 ns
18.772 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[4] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.042 ns
18.776 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.038 ns
18.782 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.032 ns
18.787 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 1.027 ns
18.850 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[9] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.964 ns
18.888 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[5] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.926 ns
18.894 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.920 ns
18.898 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.916 ns
18.904 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.910 ns
18.961 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.853 ns
18.981 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.833 ns
18.981 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.833 ns
18.992 ns Restricted to 422.12 MHz ( period = 2.37 ns ) std_1s10:inst|pll:the_pll|control_reg_out[12] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 20.000 ns 19.814 ns 0.822 ns
Timing analysis restricted to 200 rows. To change the limit use Settings (Assignments menu)              


Clock Setup: 'altera_internal_jtag~TCKUTAP'

Top
Slack Actual fmax (period) From To From Clock To Clock Required Setup Relationship Required Longest P2P Time Actual Longest P2P Time
N/A 120.13 MHz ( period = 8.324 ns ) std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 3.962 ns
N/A 123.61 MHz ( period = 8.090 ns ) sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 3.849 ns
N/A 123.85 MHz ( period = 8.074 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[19] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.778 ns
N/A 124.56 MHz ( period = 8.028 ns ) sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 3.824 ns
N/A 127.10 MHz ( period = 7.868 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[19] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.690 ns
N/A 128.37 MHz ( period = 7.790 ns ) sld_hub:sld_hub_inst|HUB_BYPASS_REG sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 3.689 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|read_write altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.38 MHz ( period = 7.670 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.393 ns
N/A 130.58 MHz ( period = 7.658 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[19] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.453 ns
N/A 134.97 MHz ( period = 7.409 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[19] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.231 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[20] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[21] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[22] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[23] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[24] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[26] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[27] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.35 MHz ( period = 7.388 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[25] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.088 ns
N/A 135.83 MHz ( period = 7.362 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.068 ns
N/A 135.85 MHz ( period = 7.361 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[28] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.061 ns
N/A 135.85 MHz ( period = 7.361 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[29] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.061 ns
N/A 135.85 MHz ( period = 7.361 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[30] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.061 ns
N/A 135.85 MHz ( period = 7.361 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.061 ns
N/A 136.72 MHz ( period = 7.314 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[34] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.030 ns
N/A 136.72 MHz ( period = 7.314 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[32] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.030 ns
N/A 136.72 MHz ( period = 7.314 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[33] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.030 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[20] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[21] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[22] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[23] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[24] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[26] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[27] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.24 MHz ( period = 7.182 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[25] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 7.000 ns
N/A 139.74 MHz ( period = 7.156 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.980 ns
N/A 139.76 MHz ( period = 7.155 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[28] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.973 ns
N/A 139.76 MHz ( period = 7.155 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[29] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.973 ns
N/A 139.76 MHz ( period = 7.155 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[30] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.973 ns
N/A 139.76 MHz ( period = 7.155 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.973 ns
N/A 140.27 MHz ( period = 7.129 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|write_stalled altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.852 ns
N/A 140.27 MHz ( period = 7.129 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|write_valid altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.852 ns
N/A 140.27 MHz ( period = 7.129 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.852 ns
N/A 140.69 MHz ( period = 7.108 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[34] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.942 ns
N/A 140.69 MHz ( period = 7.108 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[32] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.942 ns
N/A 140.69 MHz ( period = 7.108 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[33] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.942 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|read_write altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 141.04 MHz ( period = 7.090 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.904 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[20] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[21] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[22] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[23] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[24] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[26] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[27] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.43 MHz ( period = 6.972 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[25] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.763 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[9] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[8] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.88 MHz ( period = 6.950 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.673 ns
N/A 143.97 MHz ( period = 6.946 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.743 ns
N/A 143.99 MHz ( period = 6.945 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[28] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.736 ns
N/A 143.99 MHz ( period = 6.945 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[29] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.736 ns
N/A 143.99 MHz ( period = 6.945 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[30] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.736 ns
N/A 143.99 MHz ( period = 6.945 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.736 ns
N/A 144.45 MHz ( period = 6.923 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|read_req altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.646 ns
N/A 144.97 MHz ( period = 6.898 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[34] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.705 ns
N/A 144.97 MHz ( period = 6.898 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[32] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.705 ns
N/A 144.97 MHz ( period = 6.898 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[33] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.705 ns
N/A 148.21 MHz ( period = 6.747 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[18] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.451 ns
N/A 148.21 MHz ( period = 6.747 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[17] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.451 ns
N/A 148.21 MHz ( period = 6.747 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[16] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.451 ns
N/A 148.54 MHz ( period = 6.732 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|jupdate altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 3.062 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[20] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[21] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[22] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[23] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[24] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[26] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[27] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 148.74 MHz ( period = 6.723 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[25] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.541 ns
N/A 149.32 MHz ( period = 6.697 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.521 ns
N/A 149.34 MHz ( period = 6.696 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[28] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.514 ns
N/A 149.34 MHz ( period = 6.696 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[29] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.514 ns
N/A 149.34 MHz ( period = 6.696 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[30] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.514 ns
N/A 149.34 MHz ( period = 6.696 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.514 ns
N/A 149.37 MHz ( period = 6.695 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[10] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.418 ns
N/A 150.40 MHz ( period = 6.649 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[34] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.483 ns
N/A 150.40 MHz ( period = 6.649 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[32] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.483 ns
N/A 150.40 MHz ( period = 6.649 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[33] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.483 ns
N/A 150.42 MHz ( period = 6.648 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.344 ns
N/A 150.42 MHz ( period = 6.648 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[8] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.344 ns
N/A 150.42 MHz ( period = 6.648 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.344 ns
N/A 150.42 MHz ( period = 6.648 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.344 ns
N/A 150.74 MHz ( period = 6.634 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 3.131 ns
N/A 152.70 MHz ( period = 6.549 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|write_stalled altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.363 ns
N/A 152.70 MHz ( period = 6.549 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|write_valid altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.363 ns
N/A 152.70 MHz ( period = 6.549 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.363 ns
N/A 152.88 MHz ( period = 6.541 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[18] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.363 ns
N/A 152.88 MHz ( period = 6.541 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[17] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.363 ns
N/A 152.88 MHz ( period = 6.541 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[16] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.363 ns
N/A 153.37 MHz ( period = 6.520 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 3.047 ns
N/A 153.66 MHz ( period = 6.508 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.214 ns
N/A 153.66 MHz ( period = 6.508 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[36] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.214 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|read_write altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 154.68 MHz ( period = 6.465 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.306 ns
N/A 155.86 MHz ( period = 6.416 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|jupdate altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 2.914 ns
N/A 156.69 MHz ( period = 6.382 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[9] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.091 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[9] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[8] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 156.99 MHz ( period = 6.370 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.184 ns
N/A 157.06 MHz ( period = 6.367 ns ) std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|ir[1] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[26] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.177 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[9] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[8] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.51 MHz ( period = 6.349 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.072 ns
N/A 157.55 MHz ( period = 6.347 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.057 ns
N/A 157.55 MHz ( period = 6.347 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[15] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.057 ns
N/A 157.65 MHz ( period = 6.343 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|read_req altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.157 ns
N/A 157.88 MHz ( period = 6.334 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 2.981 ns
N/A 157.95 MHz ( period = 6.331 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[18] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.126 ns
N/A 157.95 MHz ( period = 6.331 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[17] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.126 ns
N/A 157.95 MHz ( period = 6.331 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[16] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.126 ns
N/A 158.68 MHz ( period = 6.302 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.126 ns
N/A 158.68 MHz ( period = 6.302 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[36] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 6.126 ns
N/A 160.51 MHz ( period = 6.230 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|user_saw_rvalid altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.926 ns
N/A 161.03 MHz ( period = 6.210 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.926 ns
N/A 161.03 MHz ( period = 6.210 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.926 ns
N/A 161.03 MHz ( period = 6.210 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.926 ns
N/A 161.03 MHz ( period = 6.210 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.926 ns
N/A 161.03 MHz ( period = 6.210 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.926 ns
N/A 161.50 MHz ( period = 6.192 ns ) std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 2.910 ns
N/A 162.84 MHz ( period = 6.141 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.969 ns
N/A 162.84 MHz ( period = 6.141 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[15] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.969 ns
N/A 163.53 MHz ( period = 6.115 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[10] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.929 ns
N/A 164.10 MHz ( period = 6.094 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[10] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.817 ns
N/A 164.15 MHz ( period = 6.092 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.889 ns
N/A 164.15 MHz ( period = 6.092 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[36] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.889 ns
N/A 164.42 MHz ( period = 6.082 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[18] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.904 ns
N/A 164.42 MHz ( period = 6.082 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[17] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.904 ns
N/A 164.42 MHz ( period = 6.082 ns ) sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[16] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.904 ns
N/A 164.69 MHz ( period = 6.072 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.782 ns
N/A 164.69 MHz ( period = 6.072 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.782 ns
N/A 164.74 MHz ( period = 6.070 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.780 ns
N/A 164.74 MHz ( period = 6.070 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.780 ns
N/A 164.74 MHz ( period = 6.070 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.780 ns
N/A 164.80 MHz ( period = 6.068 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.855 ns
N/A 164.80 MHz ( period = 6.068 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[8] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.855 ns
N/A 164.80 MHz ( period = 6.068 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.855 ns
N/A 164.80 MHz ( period = 6.068 ns ) sld_hub:sld_hub_inst|jtag_debug_mode_usr1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.855 ns
N/A 164.91 MHz ( period = 6.064 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 2.846 ns
N/A 165.04 MHz ( period = 6.059 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.775 ns
N/A 165.04 MHz ( period = 6.059 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.775 ns
N/A 165.04 MHz ( period = 6.059 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.775 ns
N/A 165.04 MHz ( period = 6.059 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.775 ns
N/A 165.37 MHz ( period = 6.047 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.743 ns
N/A 165.37 MHz ( period = 6.047 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[8] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.743 ns
N/A 165.37 MHz ( period = 6.047 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.743 ns
N/A 165.37 MHz ( period = 6.047 ns ) sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.743 ns
N/A 165.98 MHz ( period = 6.025 ns ) std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|DRsize[0] std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.839 ns
N/A 166.67 MHz ( period = 6.000 ns ) sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] sld_hub:sld_hub_inst|hub_tdo altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 2.804 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|read_write altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[2] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[3] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[4] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[5] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[6] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.12 MHz ( period = 5.948 ns ) sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[1] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.789 ns
N/A 168.61 MHz ( period = 5.931 ns ) sld_hub:sld_hub_inst|jtag_debug_mode std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[10] altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAP None None 5.641 ns
Timing analysis restricted to 200 rows. To change the limit use Settings (Assignments menu)              


Clock Hold: 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'

Top
Minimum Slack From To From Clock To Clock Required Hold Relationship Required Shortest P2P Time Actual Shortest P2P Time
0.528 ns std_1s10:inst|jtag_uart:the_jtag_uart|r_val std_1s10:inst|jtag_uart:the_jtag_uart|r_val std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[3] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[2] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[0] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[1] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[3] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[1] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[0] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[2] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[0] std_1s10:inst|cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|cpu:the_cpu|ic_fill_dp_offset[1] std_1s10:inst|cpu:the_cpu|ic_fill_dp_offset[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.528 ns std_1s10:inst|cpu:the_cpu|ic_fill_dp_offset[0] std_1s10:inst|cpu:the_cpu|ic_fill_dp_offset[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.452 ns
0.604 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|cpu_instruction_master_read_data_valid_ext_ram_s1_shift_register[0] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|cpu_instruction_master_read_data_valid_ext_ram_s1_shift_register[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.528 ns
0.604 ns std_1s10:inst|cpu:the_cpu|E_pc[10] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[10] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.528 ns
0.604 ns std_1s10:inst|cpu:the_cpu|E_ctrl_rot std_1s10:inst|cpu:the_cpu|M_ctrl_rot std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.528 ns
0.605 ns std_1s10:inst|cpu:the_cpu|D_pc[5] std_1s10:inst|cpu:the_cpu|E_pc[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.529 ns
0.605 ns std_1s10:inst|cpu:the_cpu|E_pc[23] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[23] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.529 ns
0.605 ns std_1s10:inst|cpu:the_cpu|D_iw[12] std_1s10:inst|cpu:the_cpu|E_iw[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.529 ns
0.605 ns std_1s10:inst|cpu:the_cpu|E_pc[0] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.529 ns
0.606 ns std_1s10:inst|button_pio:the_button_pio|d1_data_in[0] std_1s10:inst|button_pio:the_button_pio|d2_data_in[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.530 ns
0.606 ns std_1s10:inst|cpu:the_cpu|F_pc[9] std_1s10:inst|cpu:the_cpu|D_pc[9] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.530 ns
0.609 ns std_1s10:inst|cpu:the_cpu|E_pc[11] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.533 ns
0.611 ns std_1s10:inst|cpu:the_cpu|E_pc[17] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[17] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.535 ns
0.611 ns std_1s10:inst|cpu:the_cpu|E_pc[21] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[21] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.535 ns
0.611 ns std_1s10:inst|cpu:the_cpu|E_iw[1] std_1s10:inst|cpu:the_cpu|M_iw[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.535 ns
0.611 ns std_1s10:inst|cpu:the_cpu|E_dst_regnum[2] std_1s10:inst|cpu:the_cpu|M_dst_regnum[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.535 ns
0.611 ns std_1s10:inst|cpu:the_cpu|av_ld_aligning_data std_1s10:inst|cpu:the_cpu|av_ld_or_div_done std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.535 ns
0.612 ns std_1s10:inst|cpu:the_cpu|E_pc[4] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.536 ns
0.613 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|cpu_instruction_master_read_data_valid_ext_flash_s1_shift_register[0] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|cpu_instruction_master_read_data_valid_ext_flash_s1_shift_register[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.537 ns
0.613 ns std_1s10:inst|cpu:the_cpu|E_pc[20] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[20] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.537 ns
0.614 ns std_1s10:inst|sdram:the_sdram|rd_valid[2] std_1s10:inst|sdram:the_sdram|za_valid std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.538 ns
0.615 ns std_1s10:inst|cpu:the_cpu|E_pc[7] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.539 ns
0.615 ns std_1s10:inst|cpu:the_cpu|E_pc[1] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.539 ns
0.616 ns std_1s10:inst|cpu:the_cpu|E_pc[14] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[14] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.540 ns
0.617 ns std_1s10:inst|cpu:the_cpu|E_iw[11] std_1s10:inst|cpu:the_cpu|M_iw[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.541 ns
0.617 ns std_1s10:inst|sdram:the_sdram|rd_valid[1] std_1s10:inst|sdram:the_sdram|rd_valid[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.541 ns
0.617 ns std_1s10:inst|cpu:the_cpu|E_pc[3] std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.541 ns
0.618 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_write_done_sync_module:clock_0_master_write_done_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:write_done_edge_to_pulse|data_in_d1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.542 ns
0.624 ns std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|rvalid0 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|rvalid std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.548 ns
0.624 ns std_1s10:inst|button_pio:the_button_pio|d1_data_in[1] std_1s10:inst|button_pio:the_button_pio|d2_data_in[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.548 ns
0.625 ns std_1s10:inst|button_pio:the_button_pio|d1_data_in[2] std_1s10:inst|button_pio:the_button_pio|d2_data_in[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.549 ns
0.626 ns std_1s10:inst|cpu:the_cpu|F_pc[0] std_1s10:inst|cpu:the_cpu|D_pc[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.550 ns
0.643 ns std_1s10:inst|cpu:the_cpu|F_pc[2] std_1s10:inst|cpu:the_cpu|D_pc[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.567 ns
0.729 ns std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:rd_ptr_count|safe_q[5] std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:rd_ptr_count|safe_q[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.653 ns
0.729 ns std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:wr_ptr|safe_q[5] std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:wr_ptr|safe_q[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.653 ns
0.729 ns std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:rd_ptr_count|safe_q[5] std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:rd_ptr_count|safe_q[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.653 ns
0.729 ns std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:wr_ptr|safe_q[5] std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|cntr_te8:wr_ptr|safe_q[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.653 ns
0.729 ns std_1s10:inst|cpu:the_cpu|D_pc[14] std_1s10:inst|cpu:the_cpu|E_pc[14] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.653 ns
0.729 ns std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|a_fefifo_7cf:fifo_state|cntr_bd7:count_usedw|safe_q[5] std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|a_fefifo_7cf:fifo_state|cntr_bd7:count_usedw|safe_q[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.653 ns
0.729 ns std_1s10:inst|cpu:the_cpu|W_wr_data[31] std_1s10:inst|cpu:the_cpu|E_src1_prelim[31] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.653 ns
0.730 ns std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|tx_overrun std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|tx_overrun std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.654 ns
0.730 ns std_1s10:inst|button_pio:the_button_pio|d1_data_in[3] std_1s10:inst|button_pio:the_button_pio|d2_data_in[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.654 ns
0.730 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[2] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|how_many_ones[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.654 ns
0.730 ns std_1s10:inst|sdram:the_sdram|active_data[25] std_1s10:inst|sdram:the_sdram|active_data[25] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.654 ns
0.730 ns std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[3] std_1s10:inst|cpu:the_cpu|F_pc[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.654 ns
0.730 ns std_1s10:inst|cpu:the_cpu|E_iw[2] std_1s10:inst|cpu:the_cpu|M_iw[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.654 ns
0.730 ns std_1s10:inst|cpu:the_cpu|W_wr_data[3] std_1s10:inst|cpu:the_cpu|E_src2_prelim[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.654 ns
0.731 ns std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|jupdate1 std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|jupdate2 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.655 ns
0.731 ns std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[4] std_1s10:inst|cpu:the_cpu|F_pc[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.655 ns
0.731 ns std_1s10:inst|cpu:the_cpu|D_pc_plus_one[1] std_1s10:inst|cpu:the_cpu|E_extra_pc[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.655 ns
0.732 ns std_1s10:inst|cpu:the_cpu|D_pc[8] std_1s10:inst|cpu:the_cpu|E_pc[8] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.656 ns
0.733 ns std_1s10:inst|sdram:the_sdram|active_data[31] std_1s10:inst|sdram:the_sdram|active_data[31] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.657 ns
0.733 ns std_1s10:inst|cpu:the_cpu|D_pc[13] std_1s10:inst|cpu:the_cpu|F_pc[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.657 ns
0.733 ns std_1s10:inst|cpu:the_cpu|W_wr_data[23] std_1s10:inst|cpu:the_cpu|E_src1_prelim[23] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.657 ns
0.734 ns std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[6] std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[6] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.658 ns
0.734 ns std_1s10:inst|sdram:the_sdram|m_data[31]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[31]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.658 ns
0.734 ns std_1s10:inst|sdram:the_sdram|m_bank[1]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_bank[1]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.658 ns
0.735 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonRd std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonRd std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.659 ns
0.735 ns std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[5] std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.659 ns
0.735 ns std_1s10:inst|sdram:the_sdram|active_data[7] std_1s10:inst|sdram:the_sdram|active_data[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.659 ns
0.736 ns std_1s10:inst|jtag_uart:the_jtag_uart|rvalid std_1s10:inst|jtag_uart:the_jtag_uart|rvalid std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.660 ns
0.736 ns std_1s10:inst|cpu:the_cpu|D_pc[21] std_1s10:inst|cpu:the_cpu|F_pc[21] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.660 ns
0.736 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|probepresent std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|probepresent std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.660 ns
0.736 ns std_1s10:inst|cpu:the_cpu|F_pc[21] std_1s10:inst|cpu:the_cpu|D_pc[21] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.660 ns
0.736 ns std_1s10:inst|sdram:the_sdram|m_dqm[0]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_dqm[0]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.660 ns
0.737 ns std_1s10:inst|button_pio:the_button_pio|d2_data_in[1] std_1s10:inst|button_pio:the_button_pio|edge_capture[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.661 ns
0.737 ns std_1s10:inst|sdram:the_sdram|active_data[13] std_1s10:inst|sdram:the_sdram|active_data[13] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.661 ns
0.737 ns std_1s10:inst|cpu:the_cpu|W_wr_data[9] std_1s10:inst|cpu:the_cpu|E_src2_prelim[9] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.661 ns
0.738 ns std_1s10:inst|cpu:the_cpu|W_wr_data[0] std_1s10:inst|cpu:the_cpu|E_src1_prelim[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.662 ns
0.738 ns std_1s10:inst|cpu:the_cpu|W_wr_data[2] std_1s10:inst|cpu:the_cpu|E_src1_prelim[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.662 ns
0.739 ns std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|a_fefifo_7cf:fifo_state|cntr_bd7:count_usedw|safe_q[5] std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|a_fefifo_7cf:fifo_state|cntr_bd7:count_usedw|safe_q[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.663 ns
0.739 ns std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[2] std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.663 ns
0.739 ns std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[1] std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.663 ns
0.739 ns std_1s10:inst|sdram:the_sdram|m_data[7]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[7]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.663 ns
0.740 ns std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[0] std_1s10:inst|cpu:the_cpu|ic_fill_valid_bits[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.664 ns
0.740 ns std_1s10:inst|sdram:the_sdram|m_data[27]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[27]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.664 ns
0.740 ns std_1s10:inst|sdram:the_sdram|m_bank[0]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_bank[0]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.664 ns
0.740 ns std_1s10:inst|cpu:the_cpu|M_ienable_reg[5] std_1s10:inst|cpu:the_cpu|E_control_rd_data_without_mmu_regs[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.664 ns
0.741 ns std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|sync_rxd std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|baud_clk_en std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|uart1:the_uart1|uart1_regs:the_uart1_regs|internal_tx_data[1] std_1s10:inst|uart1:the_uart1|uart1_regs:the_uart1_regs|readdata[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|sys_clk_timer:the_sys_clk_timer|period_h_register[6] std_1s10:inst|sys_clk_timer:the_sys_clk_timer|readdata[6] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|clock_0:the_clock_0|slave_readdata[8] std_1s10:inst|cpu_data_master_arbitrator:the_cpu_data_master|registered_cpu_data_master_readdata[8] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|sys_clk_timer:the_sys_clk_timer|period_h_register[7] std_1s10:inst|sys_clk_timer:the_sys_clk_timer|readdata[7] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|sdram:the_sdram|active_data[8] std_1s10:inst|sdram:the_sdram|active_data[8] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|sdram:the_sdram|m_data[9]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[9]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|sdram:the_sdram|m_data[21]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[21]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|cpu:the_cpu|D_pc[0] std_1s10:inst|cpu:the_cpu|F_pc[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|cpu:the_cpu|D_pc[23] std_1s10:inst|cpu:the_cpu|F_pc[23] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|cpu:the_cpu|W_wr_data[14] std_1s10:inst|cpu:the_cpu|E_src2_prelim[14] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|cpu:the_cpu|W_wr_data[4] std_1s10:inst|cpu:the_cpu|E_src2_prelim[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|cpu:the_cpu|W_wr_data[18] std_1s10:inst|cpu:the_cpu|E_src1_prelim[18] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|cpu:the_cpu|E_ctrl_br_cond std_1s10:inst|cpu:the_cpu|M_pipe_flush std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.665 ns
0.742 ns std_1s10:inst|sdram:the_sdram|m_cmd[0]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|rd_valid[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.666 ns
0.742 ns std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|baud_rate_counter[8] std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|baud_rate_counter[8] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.666 ns
0.742 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonRd1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|internal_MonDReg[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.666 ns
0.742 ns std_1s10:inst|sdram:the_sdram|active_data[0] std_1s10:inst|sdram:the_sdram|active_data[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.666 ns
0.742 ns std_1s10:inst|cpu:the_cpu|W_wr_data[20] std_1s10:inst|cpu:the_cpu|E_src1_prelim[20] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.666 ns
0.742 ns std_1s10:inst|sdram:the_sdram|m_dqm[1]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_dqm[1]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.666 ns
0.742 ns std_1s10:inst|cpu:the_cpu|M_valid_mul_shift_rot_entered_M std_1s10:inst|cpu:the_cpu|M_mul_shift_rot_stall std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.666 ns
0.743 ns std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[1] std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.667 ns
0.743 ns std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|break_detect std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|break_detect std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.667 ns
0.743 ns std_1s10:inst|cpu:the_cpu|W_wr_data[10] std_1s10:inst|cpu:the_cpu|E_src2_prelim[10] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.667 ns
0.743 ns std_1s10:inst|cpu:the_cpu|ic_fill_ap_cnt[3] std_1s10:inst|cpu:the_cpu|ic_fill_ap_cnt[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.667 ns
0.743 ns std_1s10:inst|sdram:the_sdram|m_dqm[3]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_dqm[3]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.667 ns
0.744 ns std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[5] std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.668 ns
0.744 ns std_1s10:inst|cpu:the_cpu|M_ienable_reg[4] std_1s10:inst|cpu:the_cpu|E_control_rd_data_without_mmu_regs[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.668 ns
0.744 ns std_1s10:inst|cpu:the_cpu|F_pc[17] std_1s10:inst|cpu:the_cpu|D_pc[17] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.668 ns
0.745 ns std_1s10:inst|cpu:the_cpu|W_wr_data[30] std_1s10:inst|cpu:the_cpu|E_src2_prelim[30] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.669 ns
0.745 ns std_1s10:inst|sdram:the_sdram|m_data[2]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[2]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.669 ns
0.745 ns std_1s10:inst|sdram:the_sdram|active_data[9] std_1s10:inst|sdram:the_sdram|active_data[9] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.669 ns
0.745 ns std_1s10:inst|sdram:the_sdram|active_data[16] std_1s10:inst|sdram:the_sdram|active_data[16] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.669 ns
0.745 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|stage_1 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|stage_0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.669 ns
0.745 ns std_1s10:inst|cpu_instruction_master_arbitrator:the_cpu_instruction_master|cpu_instruction_master_read_but_no_slave_selected std_1s10:inst|cpu:the_cpu|i_readdatavalid_d1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.669 ns
0.746 ns std_1s10:inst|sdram:the_sdram|m_data[22]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[22]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.670 ns
0.746 ns std_1s10:inst|cpu:the_cpu|W_wr_data[24] std_1s10:inst|cpu:the_cpu|E_src2_prelim[24] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.670 ns
0.747 ns std_1s10:inst|sdram:the_sdram|active_data[14] std_1s10:inst|sdram:the_sdram|active_data[14] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.671 ns
0.747 ns std_1s10:inst|sdram:the_sdram|m_data[15]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[15]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.671 ns
0.747 ns std_1s10:inst|cpu:the_cpu|D_iw[17] std_1s10:inst|cpu:the_cpu|E_dst_regnum[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.671 ns
0.747 ns std_1s10:inst|sdram:the_sdram|ack_refresh_request std_1s10:inst|sdram:the_sdram|refresh_request std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.671 ns
0.747 ns std_1s10:inst|cpu:the_cpu|F_pc[16] std_1s10:inst|cpu:the_cpu|D_pc[16] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.671 ns
0.748 ns std_1s10:inst|cpu:the_cpu|D_pc[22] std_1s10:inst|cpu:the_cpu|E_pc[22] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.672 ns
0.748 ns std_1s10:inst|sdram:the_sdram|m_data[17]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[17]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.672 ns
0.748 ns std_1s10:inst|sdram:the_sdram|m_data[24]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[24]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.672 ns
0.748 ns std_1s10:inst|cpu:the_cpu|E_iw[15] std_1s10:inst|cpu:the_cpu|M_iw[15] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.672 ns
0.748 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|dr_update1 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|dr_update2 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.672 ns
0.748 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|stage_1 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_data_master_to_sdram_s1_module:rdv_fifo_for_cpu_data_master_to_sdram_s1|stage_0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.672 ns
0.748 ns std_1s10:inst|sdram:the_sdram|active_dqm[3] std_1s10:inst|sdram:the_sdram|active_dqm[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.672 ns
0.749 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonWr std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonWr std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.673 ns
0.749 ns std_1s10:inst|sdram:the_sdram|active_data[28] std_1s10:inst|sdram:the_sdram|active_data[28] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.673 ns
0.749 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[2] std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|how_many_ones[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.673 ns
0.749 ns std_1s10:inst|cpu:the_cpu|D_pc[19] std_1s10:inst|cpu:the_cpu|F_pc[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.673 ns
0.749 ns std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|pre_txd std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|pre_txd std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.673 ns
0.750 ns std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[2] std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.674 ns
0.750 ns std_1s10:inst|cpu:the_cpu|D_pc[15] std_1s10:inst|cpu:the_cpu|E_pc[15] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.674 ns
0.750 ns std_1s10:inst|cpu:the_cpu|D_pc[19] std_1s10:inst|cpu:the_cpu|E_pc[19] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.674 ns
0.750 ns std_1s10:inst|sdram:the_sdram|active_data[6] std_1s10:inst|sdram:the_sdram|active_data[6] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.674 ns
0.750 ns std_1s10:inst|cpu:the_cpu|D_pc[22] std_1s10:inst|cpu:the_cpu|F_pc[22] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.674 ns
0.750 ns std_1s10:inst|sdram:the_sdram|m_addr[8]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_addr[8]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.674 ns
0.750 ns std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|pre_txd std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|txd std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.674 ns
0.751 ns std_1s10:inst|sdram:the_sdram|active_data[3] std_1s10:inst|sdram:the_sdram|active_data[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.675 ns
0.751 ns std_1s10:inst|sdram:the_sdram|m_data[29]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[29]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.675 ns
0.751 ns std_1s10:inst|cpu:the_cpu|ic_fill_initial_offset[2] std_1s10:inst|cpu:the_cpu|ic_fill_dp_offset[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.675 ns
0.752 ns std_1s10:inst|jtag_uart:the_jtag_uart|ac std_1s10:inst|jtag_uart:the_jtag_uart|ac std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.676 ns
0.752 ns std_1s10:inst|jtag_uart:the_jtag_uart|woverflow std_1s10:inst|cpu_data_master_arbitrator:the_cpu_data_master|registered_cpu_data_master_readdata[14] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.676 ns
0.752 ns std_1s10:inst|sdram:the_sdram|m_data[12]~_Duplicate_1 std_1s10:inst|sdram:the_sdram|m_data[12]~_Duplicate_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.676 ns
0.752 ns std_1s10:inst|sdram:the_sdram|active_data[23] std_1s10:inst|sdram:the_sdram|active_data[23] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.676 ns
0.753 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|internal_resetlatch std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|internal_resetlatch std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.677 ns
0.753 ns std_1s10:inst|jtag_uart:the_jtag_uart|ac std_1s10:inst|cpu_data_master_arbitrator:the_cpu_data_master|registered_cpu_data_master_readdata[10] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.677 ns
0.753 ns std_1s10:inst|sdram:the_sdram|active_data[11] std_1s10:inst|sdram:the_sdram|active_data[11] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.677 ns
0.753 ns std_1s10:inst|sdram:the_sdram|active_data[24] std_1s10:inst|sdram:the_sdram|active_data[24] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.677 ns
0.753 ns std_1s10:inst|sdram:the_sdram|active_data[27] std_1s10:inst|sdram:the_sdram|active_data[27] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.677 ns
0.753 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|dr_update2 std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|jxdr std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.677 ns
0.754 ns std_1s10:inst|high_res_timer:the_high_res_timer|period_l_register[5] std_1s10:inst|high_res_timer:the_high_res_timer|internal_counter[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.678 ns
0.754 ns std_1s10:inst|cpu:the_cpu|D_pc[17] std_1s10:inst|cpu:the_cpu|F_pc[17] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.678 ns
0.755 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_FSM:slave_FSM|internal_slave_write_request std_1s10:inst|clock_0:the_clock_0|clock_0_slave_FSM:slave_FSM|internal_slave_write_request std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.679 ns
0.755 ns std_1s10:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_gg21:auto_generated|a_dpfifo_jm21:dpfifo|a_fefifo_7cf:fifo_state|b_non_empty std_1s10:inst|jtag_uart:the_jtag_uart|r_val std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.679 ns
0.755 ns std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[4] std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.679 ns
0.755 ns std_1s10:inst|sdram:the_sdram|active_data[18] std_1s10:inst|sdram:the_sdram|active_data[18] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.679 ns
0.755 ns std_1s10:inst|cpu:the_cpu|ic_fill_initial_offset[1] std_1s10:inst|cpu:the_cpu|ic_fill_dp_offset[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.679 ns
0.756 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_6 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_5 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.680 ns
0.756 ns std_1s10:inst|sdram:the_sdram|active_data[5] std_1s10:inst|sdram:the_sdram|active_data[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.680 ns
0.757 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_2 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_3 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.681 ns
0.758 ns std_1s10:inst|sdram:the_sdram|active_data[21] std_1s10:inst|sdram:the_sdram|active_data[21] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.682 ns
0.758 ns std_1s10:inst|sdram:the_sdram|active_data[30] std_1s10:inst|sdram:the_sdram|active_data[30] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.682 ns
0.758 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_1 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_2 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.682 ns
0.758 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_1 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.682 ns
0.760 ns std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|internal_oci_single_step_mode1 std_1s10:inst|cpu:the_cpu|wait_for_one_post_bret_inst std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.684 ns
0.760 ns std_1s10:inst|sdram:the_sdram|active_cs_n std_1s10:inst|sdram:the_sdram|active_cs_n std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.684 ns
0.761 ns std_1s10:inst|sdram:the_sdram|active_addr[6] std_1s10:inst|sdram:the_sdram|active_addr[6] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.685 ns
0.762 ns std_1s10:inst|sdram:the_sdram|m_next[3] std_1s10:inst|sdram:the_sdram|m_next[3] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.686 ns
0.762 ns std_1s10:inst|cpu:the_cpu|F_pc[18] std_1s10:inst|cpu:the_cpu|D_pc[18] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.686 ns
0.763 ns std_1s10:inst|sdram:the_sdram|active_addr[4] std_1s10:inst|sdram:the_sdram|active_addr[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.687 ns
0.764 ns std_1s10:inst|sdram:the_sdram|active_addr[1] std_1s10:inst|sdram:the_sdram|active_addr[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.688 ns
0.765 ns std_1s10:inst|cpu:the_cpu|M_pipe_flush_waddr[12] std_1s10:inst|cpu:the_cpu|F_pc[12] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.689 ns
0.765 ns std_1s10:inst|sdram:the_sdram|m_next[4] std_1s10:inst|sdram:the_sdram|m_next[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.689 ns
0.766 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_5 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_4 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.690 ns
0.766 ns std_1s10:inst|sdram:the_sdram|i_refs[2] std_1s10:inst|sdram:the_sdram|i_refs[2] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.690 ns
0.766 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_0 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_1 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.690 ns
0.766 ns std_1s10:inst|sdram:the_sdram|active_addr[5] std_1s10:inst|sdram:the_sdram|active_addr[5] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.690 ns
0.767 ns std_1s10:inst|sdram:the_sdram|i_refs[2] std_1s10:inst|sdram:the_sdram|i_next[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.691 ns
0.767 ns std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|unxshiftxtx_shift_register_contentsxtx_shift_reg_outxx5_out[5] std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|unxshiftxtx_shift_register_contentsxtx_shift_reg_outxx5_out[4] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.691 ns
0.767 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|d1_reasons_to_wait std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|d1_reasons_to_wait std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.691 ns
0.768 ns std_1s10:inst|cpu:the_cpu|ic_fill_ap_cnt[0] std_1s10:inst|cpu:the_cpu|ic_fill_ap_cnt[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.692 ns
0.768 ns std_1s10:inst|sdram:the_sdram|m_count[1] std_1s10:inst|sdram:the_sdram|m_count[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.692 ns
0.769 ns std_1s10:inst|cpu:the_cpu|ic_fill_ap_cnt[0] std_1s10:inst|cpu:the_cpu|ic_fill_ap_cnt[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.693 ns
0.769 ns std_1s10:inst|cpu:the_cpu|F_pc[10] std_1s10:inst|cpu:the_cpu|D_pc[10] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.693 ns
0.773 ns std_1s10:inst|sdram:the_sdram|i_count[0] std_1s10:inst|sdram:the_sdram|i_count[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.697 ns
0.773 ns std_1s10:inst|sdram:the_sdram|i_refs[0] std_1s10:inst|sdram:the_sdram|i_refs[0] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.697 ns
0.773 ns std_1s10:inst|sdram:the_sdram|i_refs[0] std_1s10:inst|sdram:the_sdram|i_refs[1] std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.697 ns
0.773 ns std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_5 std_1s10:inst|sdram_s1_arbitrator:the_sdram_s1|rdv_fifo_for_cpu_instruction_master_to_sdram_s1_module:rdv_fifo_for_cpu_instruction_master_to_sdram_s1|full_6 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0 0.000 ns -0.076 ns 0.697 ns
Timing analysis restricted to 200 rows. To change the limit use Settings (Assignments menu)            


Clock Hold: 'PLD_CLOCKINPUT'

Top
Minimum Slack From To From Clock To Clock Required Hold Relationship Required Shortest P2P Time Actual Shortest P2P Time
0.604 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[12] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.528 ns
0.610 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[9] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.534 ns
0.611 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[0] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.535 ns
0.611 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[8] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.535 ns
0.611 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.535 ns
0.635 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1 PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.559 ns
0.730 ns std_1s10:inst|std_1s10_reset_clk_domain_synch_module:std_1s10_reset_clk_domain_synch|data_in_d1 std_1s10:inst|std_1s10_reset_clk_domain_synch_module:std_1s10_reset_clk_domain_synch|data_out PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.654 ns
0.739 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[1] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.663 ns
0.739 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[5] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.663 ns
0.740 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[6] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.664 ns
0.741 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[10] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.665 ns
0.741 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[13] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.665 ns
0.742 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[11] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.666 ns
0.752 ns std_1s10:inst|pll:the_pll|countup[5] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.676 ns
0.794 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.718 ns
0.881 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.805 ns
0.898 ns std_1s10:inst|pll:the_pll|control_reg_out[12] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.822 ns
0.909 ns std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.833 ns
0.909 ns std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.833 ns
0.929 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.853 ns
0.986 ns std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.910 ns
0.992 ns std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.916 ns
0.996 ns std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.920 ns
1.002 ns std_1s10:inst|pll:the_pll|countup[5] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.926 ns
1.040 ns std_1s10:inst|pll:the_pll|control_reg_out[9] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 0.964 ns
1.103 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.027 ns
1.108 ns std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.032 ns
1.114 ns std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.038 ns
1.118 ns std_1s10:inst|pll:the_pll|countup[4] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.042 ns
1.119 ns std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.043 ns
1.120 ns std_1s10:inst|pll:the_pll|countup[4] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.044 ns
1.127 ns std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.051 ns
1.129 ns std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.053 ns
1.219 ns std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.143 ns
1.266 ns std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.190 ns
1.266 ns std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.190 ns
1.266 ns std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.190 ns
1.266 ns std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.190 ns
1.266 ns std_1s10:inst|pll:the_pll|count_done std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.190 ns
1.270 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.194 ns
1.277 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.201 ns
1.304 ns std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.228 ns
1.332 ns std_1s10:inst|pll:the_pll|control_reg_out[3] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.398 ns
1.340 ns std_1s10:inst|pll:the_pll|control_reg_out[14] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.406 ns
1.350 ns std_1s10:inst|pll:the_pll|control_reg_out[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 1.415 ns
1.354 ns std_1s10:inst|pll:the_pll|control_reg_out[15] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.420 ns
1.367 ns std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|count_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.291 ns
1.371 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.295 ns
1.399 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.090 ns 1.309 ns
1.412 ns std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.336 ns
1.422 ns std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.346 ns
1.432 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[7] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.073 ns 1.359 ns
1.452 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.376 ns
1.452 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.376 ns
1.452 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.376 ns
1.452 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.376 ns
1.452 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.376 ns
1.452 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.376 ns
1.467 ns std_1s10:inst|pll:the_pll|control_reg_out[6] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.533 ns
1.471 ns std_1s10:inst|pll:the_pll|control_reg_out[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.537 ns
1.472 ns std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.396 ns
1.474 ns std_1s10:inst|pll:the_pll|control_reg_out[8] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.540 ns
1.482 ns std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.406 ns
1.483 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[2] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.066 ns 1.417 ns
1.495 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[14] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.079 ns 1.416 ns
1.519 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.443 ns
1.532 ns std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.456 ns
1.542 ns std_1s10:inst|pll:the_pll|countup[2] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.466 ns
1.545 ns std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.469 ns
1.549 ns std_1s10:inst|pll:the_pll|countup[4] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.473 ns
1.560 ns std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.484 ns
1.561 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.485 ns
1.562 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1 PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.079 ns 1.483 ns
1.592 ns std_1s10:inst|pll:the_pll|countup[1] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.516 ns
1.593 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[4] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.098 ns 1.495 ns
1.605 ns std_1s10:inst|pll:the_pll|countup[3] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.529 ns
1.620 ns std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.544 ns
1.624 ns std_1s10:inst|pll:the_pll|control_reg_out[4] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 1.689 ns
1.626 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.550 ns
1.626 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.550 ns
1.626 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.550 ns
1.626 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.550 ns
1.626 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.550 ns
1.639 ns std_1s10:inst|pll:the_pll|control_reg_out[7] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 1.704 ns
1.674 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.598 ns
1.674 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.598 ns
1.674 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.598 ns
1.674 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.598 ns
1.674 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.598 ns
1.674 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.598 ns
1.675 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.741 ns
1.678 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.744 ns
1.680 ns std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.604 ns
1.684 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.750 ns
1.686 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.752 ns
1.695 ns std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:write_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.073 ns 1.622 ns
1.716 ns std_1s10:inst|pll:the_pll|control_reg_out[11] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.082 ns 1.634 ns
1.740 ns std_1s10:inst|pll:the_pll|countup[0] std_1s10:inst|pll:the_pll|countup[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.664 ns
1.741 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 1.806 ns
1.745 ns std_1s10:inst|pll:the_pll|control_reg_out[5] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.054 ns 1.799 ns
1.745 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.669 ns
1.785 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.851 ns
1.792 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.858 ns
1.793 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.859 ns
1.794 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 1.860 ns
1.843 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.767 ns
1.848 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.772 ns
1.848 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.772 ns
1.848 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.772 ns
1.848 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.772 ns
1.848 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.772 ns
1.874 ns std_1s10:inst|pll:the_pll|control_reg_out[2] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 1.939 ns
1.914 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.838 ns
1.914 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.838 ns
1.914 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.838 ns
1.914 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.838 ns
1.914 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.838 ns
1.914 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.838 ns
1.925 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.849 ns
1.929 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.853 ns
1.932 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.856 ns
1.944 ns std_1s10:inst|pll:the_pll|control_reg_out[13] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.080 ns 1.864 ns
1.944 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 2.009 ns
1.945 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 2.010 ns
1.955 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.079 ns 1.876 ns
1.986 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.060 ns 2.046 ns
1.987 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.060 ns 2.047 ns
1.992 ns std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.916 ns
2.022 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[15] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.169 ns 1.853 ns
2.022 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.946 ns
2.025 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.054 ns 2.079 ns
2.050 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[14] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.974 ns
2.050 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[15] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.974 ns
2.050 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.974 ns
2.050 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.974 ns
2.050 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.974 ns
2.050 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 1.974 ns
2.076 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.142 ns
2.076 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.142 ns
2.076 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.142 ns
2.076 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.142 ns
2.076 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[1] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.142 ns
2.084 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.073 ns 2.011 ns
2.085 ns std_1s10:inst|pll:the_pll|control_reg_out[10] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.082 ns 2.003 ns
2.086 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.010 ns
2.088 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.012 ns
2.088 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.012 ns
2.088 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.012 ns
2.088 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.012 ns
2.088 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.012 ns
2.096 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.020 ns
2.108 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.073 ns 2.035 ns
2.119 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.079 ns 2.040 ns
2.127 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_read_done PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.079 ns 2.048 ns
2.224 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.148 ns
2.224 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.148 ns
2.224 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.148 ns
2.224 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.148 ns
2.224 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.076 ns 2.148 ns
2.257 ns std_1s10:inst|clock_0:the_clock_0|master_writedata[3] std_1s10:inst|pll:the_pll|control_reg_out[3] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.211 ns 2.046 ns
2.298 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.364 ns
2.298 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.364 ns
2.298 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.364 ns
2.298 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.364 ns
2.298 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[2] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.364 ns
2.332 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.062 ns 2.394 ns
2.491 ns std_1s10:inst|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync|data_out std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.079 ns 2.412 ns
2.538 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.604 ns
2.538 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.604 ns
2.538 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.604 ns
2.538 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.604 ns
2.538 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.604 ns
2.557 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 2.625 ns
2.557 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 2.625 ns
2.674 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.740 ns
2.674 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.740 ns
2.674 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.740 ns
2.674 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[12] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.740 ns
2.674 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] std_1s10:inst|pll:the_pll|control_reg_out[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.066 ns 2.740 ns
2.708 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[4] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 2.776 ns
2.708 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 2.776 ns
2.761 ns std_1s10:inst|clock_0:the_clock_0|master_nativeaddress[0] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 2.826 ns
2.764 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 2.832 ns
2.797 ns std_1s10:inst|clock_0:the_clock_0|clock_0_edge_to_pulse:read_request_edge_to_pulse|data_in_d1 std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.073 ns 2.724 ns
2.915 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[7] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 2.983 ns
3.085 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 3.153 ns
3.147 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns -0.073 ns 3.074 ns
3.236 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[1] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.068 ns 3.304 ns
3.313 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 3.378 ns
3.325 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.063 ns 3.388 ns
3.325 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.063 ns 3.388 ns
3.359 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.057 ns 3.416 ns
3.464 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[13] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.065 ns 3.529 ns
3.476 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[10] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.063 ns 3.539 ns
3.476 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[11] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.063 ns 3.539 ns
3.510 ns std_1s10:inst|pll_s1_arbitrator:the_pll_s1|d1_reasons_to_wait std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[5] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.057 ns 3.567 ns
3.552 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[0] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.069 ns 3.621 ns
3.552 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[6] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.069 ns 3.621 ns
3.552 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[8] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.069 ns 3.621 ns
3.552 ns std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[1] std_1s10:inst|clock_0:the_clock_0|slave_readdata_p1[9] PLD_CLOCKINPUT PLD_CLOCKINPUT 0.000 ns 0.069 ns 3.621 ns
Timing analysis restricted to 200 rows. To change the limit use Settings (Assignments menu)            


tsu

Top
Slack Required tsu Actual tsu From To To Clock
N/A None 10.777 ns LCD_data_to_and_from_the_lcd_display[2] std_1s10:inst|cpu:the_cpu|d_readdata_d1[2] PLD_CLOCKINPUT
N/A None 10.007 ns LCD_data_to_and_from_the_lcd_display[0] std_1s10:inst|cpu:the_cpu|d_readdata_d1[0] PLD_CLOCKINPUT
N/A None 9.832 ns LCD_data_to_and_from_the_lcd_display[4] std_1s10:inst|cpu:the_cpu|d_readdata_d1[4] PLD_CLOCKINPUT
N/A None 9.202 ns LCD_data_to_and_from_the_lcd_display[5] std_1s10:inst|cpu:the_cpu|d_readdata_d1[5] PLD_CLOCKINPUT
N/A None 9.035 ns LCD_data_to_and_from_the_lcd_display[3] std_1s10:inst|cpu:the_cpu|d_readdata_d1[3] PLD_CLOCKINPUT
N/A None 8.776 ns LCD_data_to_and_from_the_lcd_display[6] std_1s10:inst|cpu:the_cpu|d_readdata_d1[6] PLD_CLOCKINPUT
N/A None 8.677 ns LCD_data_to_and_from_the_lcd_display[7] std_1s10:inst|cpu:the_cpu|d_readdata_d1[7] PLD_CLOCKINPUT
N/A None 8.494 ns LCD_data_to_and_from_the_lcd_display[1] std_1s10:inst|cpu:the_cpu|d_readdata_d1[1] PLD_CLOCKINPUT
N/A None 7.194 ns rxd_to_the_uart1 std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|d1_source_rxd PLD_CLOCKINPUT
N/A None 7.029 ns irq_from_the_lan91c111 std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_irq_from_the_lan91c111 PLD_CLOCKINPUT
N/A None 6.371 ns in_port_to_the_button_pio[3] std_1s10:inst|button_pio:the_button_pio|readdata[3] PLD_CLOCKINPUT
N/A None 6.097 ns in_port_to_the_button_pio[0] std_1s10:inst|button_pio:the_button_pio|readdata[0] PLD_CLOCKINPUT
N/A None 6.095 ns in_port_to_the_button_pio[0] std_1s10:inst|button_pio:the_button_pio|d1_data_in[0] PLD_CLOCKINPUT
N/A None 6.057 ns in_port_to_the_button_pio[1] std_1s10:inst|button_pio:the_button_pio|d1_data_in[1] PLD_CLOCKINPUT
N/A None 6.056 ns in_port_to_the_button_pio[1] std_1s10:inst|button_pio:the_button_pio|readdata[1] PLD_CLOCKINPUT
N/A None 6.003 ns in_port_to_the_button_pio[2] std_1s10:inst|button_pio:the_button_pio|readdata[2] PLD_CLOCKINPUT
N/A None 5.984 ns in_port_to_the_button_pio[2] std_1s10:inst|button_pio:the_button_pio|d1_data_in[2] PLD_CLOCKINPUT
N/A None 5.980 ns in_port_to_the_button_pio[3] std_1s10:inst|button_pio:the_button_pio|d1_data_in[3] PLD_CLOCKINPUT
N/A None 5.812 ns bidir_port_to_and_from_the_reconfig_request_pio std_1s10:inst|reconfig_request_pio:the_reconfig_request_pio|readdata PLD_CLOCKINPUT
N/A None 3.067 ns altera_internal_jtag~RUNIDLEUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|internal_monitor_go PLD_CLOCKINPUT
N/A None 3.009 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[19] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[20] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[21] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[22] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[23] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[24] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[26] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[27] altera_internal_jtag~TCKUTAP
N/A None 2.392 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[25] altera_internal_jtag~TCKUTAP
N/A None 2.366 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP
N/A None 2.365 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[28] altera_internal_jtag~TCKUTAP
N/A None 2.365 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[29] altera_internal_jtag~TCKUTAP
N/A None 2.365 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[30] altera_internal_jtag~TCKUTAP
N/A None 2.365 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP
N/A None 2.318 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[34] altera_internal_jtag~TCKUTAP
N/A None 2.318 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[32] altera_internal_jtag~TCKUTAP
N/A None 2.318 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[33] altera_internal_jtag~TCKUTAP
N/A None 1.926 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[16] altera_internal_jtag~TCKUTAP
N/A None 1.751 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[18] altera_internal_jtag~TCKUTAP
N/A None 1.751 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[17] altera_internal_jtag~TCKUTAP
N/A None 1.671 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP
N/A None 1.443 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37] altera_internal_jtag~TCKUTAP
N/A None 1.443 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[36] altera_internal_jtag~TCKUTAP
N/A None 1.395 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[0] altera_internal_jtag~TCKUTAP
N/A None 1.395 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[3] altera_internal_jtag~TCKUTAP
N/A None 1.395 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[1] altera_internal_jtag~TCKUTAP
N/A None 1.395 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[7] altera_internal_jtag~TCKUTAP
N/A None 1.395 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[2] altera_internal_jtag~TCKUTAP
N/A None 1.378 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[9] altera_internal_jtag~TCKUTAP
N/A None 1.282 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[7] altera_internal_jtag~TCKUTAP
N/A None 1.282 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[15] altera_internal_jtag~TCKUTAP
N/A None 1.208 ns ext_ram_bus_data[26] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[26] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[27] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[27] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[11] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[28] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[28] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[29] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[29] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[30] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[30] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[25] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[25] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[1] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[1] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[0] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[0] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[24] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[24] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[21] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[21] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[31] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[31] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[22] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[22] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[20] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[20] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[23] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[23] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[3] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[3] PLD_CLOCKINPUT
N/A None 1.208 ns ext_ram_bus_data[2] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[2] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[8] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[8] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[9] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[9] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[10] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[12] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[13] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[14] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[14] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[16] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[16] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[17] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[17] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[15] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[15] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[19] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[19] PLD_CLOCKINPUT
N/A None 1.162 ns ext_ram_bus_data[18] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[18] PLD_CLOCKINPUT
N/A None 1.161 ns ext_ram_bus_data[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[5] PLD_CLOCKINPUT
N/A None 1.161 ns ext_ram_bus_data[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[6] PLD_CLOCKINPUT
N/A None 1.161 ns ext_ram_bus_data[4] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[4] PLD_CLOCKINPUT
N/A None 1.161 ns ext_ram_bus_data[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[7] PLD_CLOCKINPUT
N/A None 1.144 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[0] altera_internal_jtag~TCKUTAP
N/A None 1.054 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0] altera_internal_jtag~TCKUTAP
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[1] std_1s10:inst|sdram:the_sdram|za_data[1] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[0] std_1s10:inst|sdram:the_sdram|za_data[0] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[8] std_1s10:inst|sdram:the_sdram|za_data[8] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[9] std_1s10:inst|sdram:the_sdram|za_data[9] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[26] std_1s10:inst|sdram:the_sdram|za_data[26] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[10] std_1s10:inst|sdram:the_sdram|za_data[10] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[27] std_1s10:inst|sdram:the_sdram|za_data[27] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[28] std_1s10:inst|sdram:the_sdram|za_data[28] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[12] std_1s10:inst|sdram:the_sdram|za_data[12] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[29] std_1s10:inst|sdram:the_sdram|za_data[29] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[13] std_1s10:inst|sdram:the_sdram|za_data[13] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[30] std_1s10:inst|sdram:the_sdram|za_data[30] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[14] std_1s10:inst|sdram:the_sdram|za_data[14] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[25] std_1s10:inst|sdram:the_sdram|za_data[25] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[24] std_1s10:inst|sdram:the_sdram|za_data[24] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[21] std_1s10:inst|sdram:the_sdram|za_data[21] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[31] std_1s10:inst|sdram:the_sdram|za_data[31] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[15] std_1s10:inst|sdram:the_sdram|za_data[15] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[22] std_1s10:inst|sdram:the_sdram|za_data[22] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[20] std_1s10:inst|sdram:the_sdram|za_data[20] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[19] std_1s10:inst|sdram:the_sdram|za_data[19] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[18] std_1s10:inst|sdram:the_sdram|za_data[18] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[6] std_1s10:inst|sdram:the_sdram|za_data[6] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[5] std_1s10:inst|sdram:the_sdram|za_data[5] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[11] std_1s10:inst|sdram:the_sdram|za_data[11] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[16] std_1s10:inst|sdram:the_sdram|za_data[16] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[17] std_1s10:inst|sdram:the_sdram|za_data[17] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[4] std_1s10:inst|sdram:the_sdram|za_data[4] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[23] std_1s10:inst|sdram:the_sdram|za_data[23] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[7] std_1s10:inst|sdram:the_sdram|za_data[7] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[3] std_1s10:inst|sdram:the_sdram|za_data[3] PLD_CLOCKINPUT
N/A None 1.024 ns zs_dq_to_and_from_the_sdram[2] std_1s10:inst|sdram:the_sdram|za_data[2] PLD_CLOCKINPUT
N/A None 0.879 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[8] altera_internal_jtag~TCKUTAP
N/A None 0.878 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[10] altera_internal_jtag~TCKUTAP
N/A None 0.877 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[6] altera_internal_jtag~TCKUTAP
N/A None 0.877 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[11] altera_internal_jtag~TCKUTAP
N/A None 0.877 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[13] altera_internal_jtag~TCKUTAP
N/A None 0.875 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[12] altera_internal_jtag~TCKUTAP
N/A None 0.875 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[14] altera_internal_jtag~TCKUTAP
N/A None 0.873 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[9] altera_internal_jtag~TCKUTAP
N/A None 0.823 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0] altera_internal_jtag~TCKUTAP
N/A None 0.823 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[1] altera_internal_jtag~TCKUTAP
N/A None 0.823 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[2] altera_internal_jtag~TCKUTAP
N/A None 0.823 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[3] altera_internal_jtag~TCKUTAP
N/A None 0.823 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[4] altera_internal_jtag~TCKUTAP
N/A None 0.823 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[5] altera_internal_jtag~TCKUTAP
N/A None 0.668 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[0] altera_internal_jtag~TCKUTAP
N/A None 0.668 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[3] altera_internal_jtag~TCKUTAP
N/A None 0.668 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[1] altera_internal_jtag~TCKUTAP
N/A None 0.668 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[7] altera_internal_jtag~TCKUTAP
N/A None 0.668 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[2] altera_internal_jtag~TCKUTAP
N/A None 0.555 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|state altera_internal_jtag~TCKUTAP
N/A None 0.449 ns altera_internal_jtag sld_hub:sld_hub_inst|HUB_BYPASS_REG altera_internal_jtag~TCKUTAP
N/A None 0.227 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|st_shiftdr altera_internal_jtag~TCKUTAP
N/A None 0.185 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] altera_internal_jtag~TCKUTAP
N/A None 0.185 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] altera_internal_jtag~TCKUTAP
N/A None 0.185 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] altera_internal_jtag~TCKUTAP
N/A None 0.166 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP
N/A None -0.024 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|jtag_debug_mode altera_internal_jtag~TCKUTAP
N/A None -0.122 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[10] altera_internal_jtag~TCKUTAP
N/A None -0.164 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[6] altera_internal_jtag~TCKUTAP
N/A None -0.423 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2] altera_internal_jtag~TCKUTAP
N/A None -0.423 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12] altera_internal_jtag~TCKUTAP
N/A None -0.423 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15] altera_internal_jtag~TCKUTAP
N/A None -0.583 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] altera_internal_jtag~TCKUTAP
N/A None -0.584 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] altera_internal_jtag~TCKUTAP
N/A None -0.588 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] altera_internal_jtag~TCKUTAP
N/A None -0.629 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[10] altera_internal_jtag~TCKUTAP
N/A None -0.630 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[9] altera_internal_jtag~TCKUTAP
N/A None -0.631 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] altera_internal_jtag~TCKUTAP
N/A None -0.635 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] altera_internal_jtag~TCKUTAP
N/A None -0.702 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] altera_internal_jtag~TCKUTAP
N/A None -0.702 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[2] altera_internal_jtag~TCKUTAP
N/A None -0.702 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[1] altera_internal_jtag~TCKUTAP
N/A None -0.717 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[1] altera_internal_jtag~TCKUTAP
N/A None -0.717 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[11] altera_internal_jtag~TCKUTAP
N/A None -0.717 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[13] altera_internal_jtag~TCKUTAP
N/A None -0.813 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] altera_internal_jtag~TCKUTAP
N/A None -0.813 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[6] altera_internal_jtag~TCKUTAP
N/A None -0.834 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[3] altera_internal_jtag~TCKUTAP
N/A None -0.964 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[7] altera_internal_jtag~TCKUTAP
N/A None -0.992 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7] altera_internal_jtag~TCKUTAP
N/A None -0.998 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5] altera_internal_jtag~TCKUTAP
N/A None -1.038 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[14] altera_internal_jtag~TCKUTAP
N/A None -1.055 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[15] altera_internal_jtag~TCKUTAP
N/A None -1.127 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37] altera_internal_jtag~TCKUTAP
N/A None -1.144 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|write_stalled altera_internal_jtag~TCKUTAP
N/A None -1.178 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9] altera_internal_jtag~TCKUTAP
N/A None -1.284 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0] altera_internal_jtag~TCKUTAP
N/A None -1.503 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[0] altera_internal_jtag~TCKUTAP
N/A None -1.507 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7] altera_internal_jtag~TCKUTAP


tco

Top
Slack Required tco Actual tco From To From Clock
N/A None 12.716 ns std_1s10:inst|cpu:the_cpu|M_alu_result[19] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.555 ns std_1s10:inst|cpu:the_cpu|M_alu_result[16] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.383 ns std_1s10:inst|cpu:the_cpu|M_alu_result[9] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.279 ns std_1s10:inst|cpu:the_cpu|M_alu_result[25] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.215 ns std_1s10:inst|cpu:the_cpu|M_alu_result[24] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.179 ns std_1s10:inst|cpu:the_cpu|M_alu_result[23] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.174 ns std_1s10:inst|cpu:the_cpu|M_alu_result[22] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.091 ns std_1s10:inst|cpu:the_cpu|M_alu_result[6] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 12.087 ns std_1s10:inst|cpu:the_cpu|M_alu_result[10] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.993 ns std_1s10:inst|cpu:the_cpu|M_alu_result[14] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.910 ns std_1s10:inst|cpu:the_cpu|M_alu_result[21] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.842 ns std_1s10:inst|cpu:the_cpu|M_alu_result[13] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.807 ns std_1s10:inst|cpu:the_cpu|M_alu_result[8] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.804 ns std_1s10:inst|cpu:the_cpu|M_alu_result[17] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.787 ns std_1s10:inst|cpu:the_cpu|M_alu_result[20] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.757 ns std_1s10:inst|cpu:the_cpu|M_alu_result[12] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.660 ns std_1s10:inst|cpu:the_cpu|M_alu_result[18] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.608 ns std_1s10:inst|cpu:the_cpu|M_alu_result[15] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.324 ns std_1s10:inst|cpu:the_cpu|M_alu_result[11] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.116 ns std_1s10:inst|cpu:the_cpu|M_alu_result[5] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 11.054 ns std_1s10:inst|cpu:the_cpu|M_alu_result[4] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 10.948 ns std_1s10:inst|cpu:the_cpu|internal_d_write LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 10.859 ns std_1s10:inst|cpu:the_cpu|internal_d_read LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 10.026 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|lcd_display_control_slave_wait_counter[0] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 9.853 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|lcd_display_control_slave_wait_counter[2] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 9.624 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|lcd_display_control_slave_wait_counter[4] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 9.407 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|lcd_display_control_slave_wait_counter[5] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 9.190 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|lcd_display_control_slave_wait_counter[3] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 9.005 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|lcd_display_control_slave_wait_counter[1] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 8.776 ns std_1s10:inst|cpu:the_cpu|M_alu_result[7] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 8.492 ns std_1s10:inst|cpu:the_cpu|M_mem_byte_en[0] LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 7.998 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_ram_local write_n_to_the_ext_ram PLD_CLOCKINPUT
N/A None 6.904 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_ram_mask write_n_to_the_ext_ram PLD_CLOCKINPUT
N/A None 6.372 ns std_1s10:inst|cpu:the_cpu|M_st_data[3] LCD_data_to_and_from_the_lcd_display[3] PLD_CLOCKINPUT
N/A None 6.367 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[8] out_port_from_the_seven_seg_pio[8] PLD_CLOCKINPUT
N/A None 6.344 ns std_1s10:inst|cpu:the_cpu|M_st_data[2] LCD_data_to_and_from_the_lcd_display[2] PLD_CLOCKINPUT
N/A None 6.327 ns std_1s10:inst|cpu:the_cpu|M_st_data[6] LCD_data_to_and_from_the_lcd_display[6] PLD_CLOCKINPUT
N/A None 6.176 ns std_1s10:inst|cpu:the_cpu|M_st_data[1] LCD_data_to_and_from_the_lcd_display[1] PLD_CLOCKINPUT
N/A None 6.149 ns std_1s10:inst|cpu:the_cpu|M_st_data[5] LCD_data_to_and_from_the_lcd_display[5] PLD_CLOCKINPUT
N/A None 6.140 ns std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|d1_reasons_to_wait LCD_E_from_the_lcd_display PLD_CLOCKINPUT
N/A None 6.020 ns std_1s10:inst|cpu:the_cpu|M_st_data[0] LCD_data_to_and_from_the_lcd_display[0] PLD_CLOCKINPUT
N/A None 5.871 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[6] PLD_CLOCKINPUT
N/A None 5.871 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[5] PLD_CLOCKINPUT
N/A None 5.871 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[4] PLD_CLOCKINPUT
N/A None 5.871 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[3] PLD_CLOCKINPUT
N/A None 5.820 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[7] PLD_CLOCKINPUT
N/A None 5.672 ns std_1s10:inst|cpu:the_cpu|M_st_data[7] LCD_data_to_and_from_the_lcd_display[7] PLD_CLOCKINPUT
N/A None 5.624 ns std_1s10:inst|cpu:the_cpu|M_st_data[4] LCD_data_to_and_from_the_lcd_display[4] PLD_CLOCKINPUT
N/A None 5.612 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[7] out_port_from_the_seven_seg_pio[7] PLD_CLOCKINPUT
N/A None 5.583 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[9] out_port_from_the_seven_seg_pio[9] PLD_CLOCKINPUT
N/A None 5.549 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[10] out_port_from_the_seven_seg_pio[10] PLD_CLOCKINPUT
N/A None 5.528 ns std_1s10:inst|led_pio:the_led_pio|data_out[2] out_port_from_the_led_pio[2] PLD_CLOCKINPUT
N/A None 5.521 ns std_1s10:inst|uart1:the_uart1|uart1_tx:the_uart1_tx|txd txd_from_the_uart1 PLD_CLOCKINPUT
N/A None 5.420 ns std_1s10:inst|cpu:the_cpu|M_alu_result[3] LCD_RS_from_the_lcd_display PLD_CLOCKINPUT
N/A None 5.403 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[1] PLD_CLOCKINPUT
N/A None 5.403 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[0] PLD_CLOCKINPUT
N/A None 5.403 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_data_to_and_from_the_lcd_display[2] PLD_CLOCKINPUT
N/A None 5.398 ns std_1s10:inst|led_pio:the_led_pio|data_out[0] out_port_from_the_led_pio[0] PLD_CLOCKINPUT
N/A None 5.369 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[1] PLD_CLOCKINPUT
N/A None 5.369 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[0] PLD_CLOCKINPUT
N/A None 5.369 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[3] PLD_CLOCKINPUT
N/A None 5.369 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[2] PLD_CLOCKINPUT
N/A None 5.330 ns std_1s10:inst|cpu:the_cpu|M_alu_result[2] LCD_RW_from_the_lcd_display PLD_CLOCKINPUT
N/A None 5.329 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[6] PLD_CLOCKINPUT
N/A None 5.329 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[5] PLD_CLOCKINPUT
N/A None 5.329 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[4] PLD_CLOCKINPUT
N/A None 5.329 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[7] PLD_CLOCKINPUT
N/A None 5.308 ns std_1s10:inst|led_pio:the_led_pio|data_out[1] out_port_from_the_led_pio[1] PLD_CLOCKINPUT
N/A None 5.285 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[8] PLD_CLOCKINPUT
N/A None 5.285 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[9] PLD_CLOCKINPUT
N/A None 5.285 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[10] PLD_CLOCKINPUT
N/A None 5.285 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[12] PLD_CLOCKINPUT
N/A None 5.285 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[11] PLD_CLOCKINPUT
N/A None 5.273 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[0] out_port_from_the_seven_seg_pio[0] PLD_CLOCKINPUT
N/A None 5.227 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[13] PLD_CLOCKINPUT
N/A None 5.227 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[14] PLD_CLOCKINPUT
N/A None 5.227 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[15] PLD_CLOCKINPUT
N/A None 5.227 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[18] PLD_CLOCKINPUT
N/A None 5.227 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[16] PLD_CLOCKINPUT
N/A None 5.227 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[17] PLD_CLOCKINPUT
N/A None 5.106 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[4] out_port_from_the_seven_seg_pio[4] PLD_CLOCKINPUT
N/A None 5.105 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[15] out_port_from_the_seven_seg_pio[15] PLD_CLOCKINPUT
N/A None 5.087 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[13] out_port_from_the_seven_seg_pio[13] PLD_CLOCKINPUT
N/A None 5.072 ns std_1s10:inst|led_pio:the_led_pio|data_out[3] out_port_from_the_led_pio[3] PLD_CLOCKINPUT
N/A None 5.071 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[3] out_port_from_the_seven_seg_pio[3] PLD_CLOCKINPUT
N/A None 5.066 ns std_1s10:inst|reconfig_request_pio:the_reconfig_request_pio|data_dir bidir_port_to_and_from_the_reconfig_request_pio PLD_CLOCKINPUT
N/A None 5.066 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[12] out_port_from_the_seven_seg_pio[12] PLD_CLOCKINPUT
N/A None 5.063 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[14] out_port_from_the_seven_seg_pio[14] PLD_CLOCKINPUT
N/A None 5.015 ns std_1s10:inst|reconfig_request_pio:the_reconfig_request_pio|data_out bidir_port_to_and_from_the_reconfig_request_pio PLD_CLOCKINPUT
N/A None 4.998 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[1] out_port_from_the_seven_seg_pio[1] PLD_CLOCKINPUT
N/A None 4.998 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[2] out_port_from_the_seven_seg_pio[2] PLD_CLOCKINPUT
N/A None 4.993 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[5] out_port_from_the_seven_seg_pio[5] PLD_CLOCKINPUT
N/A None 4.892 ns std_1s10:inst|led_pio:the_led_pio|data_out[6] out_port_from_the_led_pio[6] PLD_CLOCKINPUT
N/A None 4.868 ns std_1s10:inst|led_pio:the_led_pio|data_out[5] out_port_from_the_led_pio[5] PLD_CLOCKINPUT
N/A None 4.861 ns std_1s10:inst|led_pio:the_led_pio|data_out[4] out_port_from_the_led_pio[4] PLD_CLOCKINPUT
N/A None 4.820 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[21] PLD_CLOCKINPUT
N/A None 4.820 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[22] PLD_CLOCKINPUT
N/A None 4.820 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[20] PLD_CLOCKINPUT
N/A None 4.820 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[19] PLD_CLOCKINPUT
N/A None 4.820 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[23] PLD_CLOCKINPUT
N/A None 4.761 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[26] PLD_CLOCKINPUT
N/A None 4.761 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[25] PLD_CLOCKINPUT
N/A None 4.761 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[24] PLD_CLOCKINPUT
N/A None 4.694 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[6] out_port_from_the_seven_seg_pio[6] PLD_CLOCKINPUT
N/A None 4.632 ns std_1s10:inst|led_pio:the_led_pio|data_out[7] out_port_from_the_led_pio[7] PLD_CLOCKINPUT
N/A None 4.624 ns std_1s10:inst|seven_seg_pio:the_seven_seg_pio|data_out[11] out_port_from_the_seven_seg_pio[11] PLD_CLOCKINPUT
N/A None 4.485 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[27] PLD_CLOCKINPUT
N/A None 4.485 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[28] PLD_CLOCKINPUT
N/A None 4.485 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[29] PLD_CLOCKINPUT
N/A None 4.485 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[30] PLD_CLOCKINPUT
N/A None 4.485 ns std_1s10:inst|sdram:the_sdram|oe zs_dq_to_and_from_the_sdram[31] PLD_CLOCKINPUT
N/A None 2.721 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[0] byteenablen_to_the_lan91c111[0] PLD_CLOCKINPUT
N/A None 2.721 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[1] byteenablen_to_the_lan91c111[1] PLD_CLOCKINPUT
N/A None 2.721 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[2] byteenablen_to_the_lan91c111[2] PLD_CLOCKINPUT
N/A None 2.721 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|byteenablen_to_the_lan91c111[3] byteenablen_to_the_lan91c111[3] PLD_CLOCKINPUT
N/A None 2.721 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|iow_n_to_the_lan91c111 iow_n_to_the_lan91c111 PLD_CLOCKINPUT
N/A None 2.721 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|ior_n_to_the_lan91c111 ior_n_to_the_lan91c111 PLD_CLOCKINPUT
N/A None 2.606 ns std_1s10:inst|sdram:the_sdram|m_bank[0] zs_ba_from_the_sdram[0] PLD_CLOCKINPUT
N/A None 2.606 ns std_1s10:inst|sdram:the_sdram|m_bank[1] zs_ba_from_the_sdram[1] PLD_CLOCKINPUT
N/A None 2.606 ns std_1s10:inst|sdram:the_sdram|m_cmd[0] zs_we_n_from_the_sdram PLD_CLOCKINPUT
N/A None 2.606 ns std_1s10:inst|sdram:the_sdram|m_cmd[3] zs_cs_n_from_the_sdram PLD_CLOCKINPUT
N/A None 2.606 ns std_1s10:inst|sdram:the_sdram|m_cmd[1] zs_cas_n_from_the_sdram PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[1] zs_dq_to_and_from_the_sdram[1] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[0] zs_dq_to_and_from_the_sdram[0] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[8] zs_dq_to_and_from_the_sdram[8] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[9] zs_dq_to_and_from_the_sdram[9] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[26] zs_dq_to_and_from_the_sdram[26] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[10] zs_dq_to_and_from_the_sdram[10] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[27] zs_dq_to_and_from_the_sdram[27] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[28] zs_dq_to_and_from_the_sdram[28] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[12] zs_dq_to_and_from_the_sdram[12] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[29] zs_dq_to_and_from_the_sdram[29] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[13] zs_dq_to_and_from_the_sdram[13] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[30] zs_dq_to_and_from_the_sdram[30] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[14] zs_dq_to_and_from_the_sdram[14] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[25] zs_dq_to_and_from_the_sdram[25] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[24] zs_dq_to_and_from_the_sdram[24] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[21] zs_dq_to_and_from_the_sdram[21] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[31] zs_dq_to_and_from_the_sdram[31] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[15] zs_dq_to_and_from_the_sdram[15] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[22] zs_dq_to_and_from_the_sdram[22] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[20] zs_dq_to_and_from_the_sdram[20] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[19] zs_dq_to_and_from_the_sdram[19] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[18] zs_dq_to_and_from_the_sdram[18] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[6] zs_dq_to_and_from_the_sdram[6] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[5] zs_dq_to_and_from_the_sdram[5] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[11] zs_dq_to_and_from_the_sdram[11] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[16] zs_dq_to_and_from_the_sdram[16] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[17] zs_dq_to_and_from_the_sdram[17] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[4] zs_dq_to_and_from_the_sdram[4] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[23] zs_dq_to_and_from_the_sdram[23] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[7] zs_dq_to_and_from_the_sdram[7] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[3] zs_dq_to_and_from_the_sdram[3] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_data[2] zs_dq_to_and_from_the_sdram[2] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_dqm[0] zs_dqm_from_the_sdram[0] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_dqm[1] zs_dqm_from_the_sdram[1] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_dqm[2] zs_dqm_from_the_sdram[2] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_dqm[3] zs_dqm_from_the_sdram[3] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[0] zs_addr_from_the_sdram[0] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[1] zs_addr_from_the_sdram[1] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[2] zs_addr_from_the_sdram[2] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[3] zs_addr_from_the_sdram[3] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[4] zs_addr_from_the_sdram[4] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[5] zs_addr_from_the_sdram[5] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[6] zs_addr_from_the_sdram[6] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[7] zs_addr_from_the_sdram[7] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[8] zs_addr_from_the_sdram[8] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[9] zs_addr_from_the_sdram[9] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[10] zs_addr_from_the_sdram[10] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_addr[11] zs_addr_from_the_sdram[11] PLD_CLOCKINPUT
N/A None 2.595 ns std_1s10:inst|sdram:the_sdram|m_cmd[2] zs_ras_n_from_the_sdram PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[5] ext_ram_bus_data[5] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[6] ext_ram_bus_data[6] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[4] ext_ram_bus_data[4] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[7] ext_ram_bus_data[7] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[0] be_n_to_the_ext_ram[0] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[1] be_n_to_the_ext_ram[1] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[2] be_n_to_the_ext_ram[2] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|be_n_to_the_ext_ram[3] be_n_to_the_ext_ram[3] PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash select_n_to_the_ext_flash PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_ram select_n_to_the_ext_ram PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_ram read_n_to_the_ext_ram PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|read_n_to_the_ext_flash read_n_to_the_ext_flash PLD_CLOCKINPUT
N/A None 2.504 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|write_n_to_the_ext_flash write_n_to_the_ext_flash PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[8] ext_ram_bus_data[8] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[9] ext_ram_bus_data[9] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[26] ext_ram_bus_data[26] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[10] ext_ram_bus_data[10] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[27] ext_ram_bus_data[27] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[11] ext_ram_bus_data[11] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[28] ext_ram_bus_data[28] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[12] ext_ram_bus_data[12] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[29] ext_ram_bus_data[29] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[13] ext_ram_bus_data[13] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[30] ext_ram_bus_data[30] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[14] ext_ram_bus_data[14] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[25] ext_ram_bus_data[25] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[16] ext_ram_bus_data[16] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[1] ext_ram_bus_data[1] PLD_CLOCKINPUT
N/A None 2.457 ns std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_outgoing_ext_ram_bus_data[17] ext_ram_bus_data[17] PLD_CLOCKINPUT
Timing analysis restricted to 200 rows. To change the limit use Settings (Assignments menu)        


tpd

Top
Slack Required P2P Time Actual P2P Time From To
N/A None 2.504 ns altera_internal_jtag~TDO altera_reserved_tdo


th

Top
Minimum Slack Required th Actual th From To To Clock
N/A None 1.617 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7] altera_internal_jtag~TCKUTAP
N/A None 1.613 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[0] altera_internal_jtag~TCKUTAP
N/A None 1.394 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[0] altera_internal_jtag~TCKUTAP
N/A None 1.288 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9] altera_internal_jtag~TCKUTAP
N/A None 1.254 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|write_stalled altera_internal_jtag~TCKUTAP
N/A None 1.237 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37] altera_internal_jtag~TCKUTAP
N/A None 1.165 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[15] altera_internal_jtag~TCKUTAP
N/A None 1.151 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37] altera_internal_jtag~TCKUTAP
N/A None 1.148 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[14] altera_internal_jtag~TCKUTAP
N/A None 1.118 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[36] altera_internal_jtag~TCKUTAP
N/A None 1.108 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5] altera_internal_jtag~TCKUTAP
N/A None 1.102 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7] altera_internal_jtag~TCKUTAP
N/A None 1.074 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[7] altera_internal_jtag~TCKUTAP
N/A None 0.944 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[3] altera_internal_jtag~TCKUTAP
N/A None 0.923 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] altera_internal_jtag~TCKUTAP
N/A None 0.923 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[6] altera_internal_jtag~TCKUTAP
N/A None 0.827 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[1] altera_internal_jtag~TCKUTAP
N/A None 0.827 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[11] altera_internal_jtag~TCKUTAP
N/A None 0.827 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[13] altera_internal_jtag~TCKUTAP
N/A None 0.812 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] altera_internal_jtag~TCKUTAP
N/A None 0.812 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[2] altera_internal_jtag~TCKUTAP
N/A None 0.812 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|tms_cnt[1] altera_internal_jtag~TCKUTAP
N/A None 0.745 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] altera_internal_jtag~TCKUTAP
N/A None 0.741 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] altera_internal_jtag~TCKUTAP
N/A None 0.740 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[9] altera_internal_jtag~TCKUTAP
N/A None 0.739 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[10] altera_internal_jtag~TCKUTAP
N/A None 0.698 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] altera_internal_jtag~TCKUTAP
N/A None 0.694 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] altera_internal_jtag~TCKUTAP
N/A None 0.693 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] altera_internal_jtag~TCKUTAP
N/A None 0.547 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP
N/A None 0.533 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2] altera_internal_jtag~TCKUTAP
N/A None 0.533 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12] altera_internal_jtag~TCKUTAP
N/A None 0.533 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15] altera_internal_jtag~TCKUTAP
N/A None 0.404 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[35] altera_internal_jtag~TCKUTAP
N/A None 0.274 ns altera_internal_jtag sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[6] altera_internal_jtag~TCKUTAP
N/A None 0.232 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[10] altera_internal_jtag~TCKUTAP
N/A None 0.169 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[24] altera_internal_jtag~TCKUTAP
N/A None 0.162 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[16] altera_internal_jtag~TCKUTAP
N/A None 0.159 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[18] altera_internal_jtag~TCKUTAP
N/A None 0.136 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[32] altera_internal_jtag~TCKUTAP
N/A None 0.134 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|jtag_debug_mode altera_internal_jtag~TCKUTAP
N/A None 0.066 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[23] altera_internal_jtag~TCKUTAP
N/A None 0.030 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[29] altera_internal_jtag~TCKUTAP
N/A None -0.005 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[21] altera_internal_jtag~TCKUTAP
N/A None -0.025 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[30] altera_internal_jtag~TCKUTAP
N/A None -0.026 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[28] altera_internal_jtag~TCKUTAP
N/A None -0.075 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] altera_internal_jtag~TCKUTAP
N/A None -0.075 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] altera_internal_jtag~TCKUTAP
N/A None -0.075 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1] altera_internal_jtag~TCKUTAP
N/A None -0.090 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[17] altera_internal_jtag~TCKUTAP
N/A None -0.117 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|st_shiftdr altera_internal_jtag~TCKUTAP
N/A None -0.134 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[25] altera_internal_jtag~TCKUTAP
N/A None -0.156 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[22] altera_internal_jtag~TCKUTAP
N/A None -0.170 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[19] altera_internal_jtag~TCKUTAP
N/A None -0.226 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[33] altera_internal_jtag~TCKUTAP
N/A None -0.227 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[34] altera_internal_jtag~TCKUTAP
N/A None -0.259 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[20] altera_internal_jtag~TCKUTAP
N/A None -0.339 ns altera_internal_jtag sld_hub:sld_hub_inst|HUB_BYPASS_REG altera_internal_jtag~TCKUTAP
N/A None -0.365 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[27] altera_internal_jtag~TCKUTAP
N/A None -0.436 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[26] altera_internal_jtag~TCKUTAP
N/A None -0.445 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|state altera_internal_jtag~TCKUTAP
N/A None -0.466 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[3] altera_internal_jtag~TCKUTAP
N/A None -0.467 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[4] altera_internal_jtag~TCKUTAP
N/A None -0.468 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[2] altera_internal_jtag~TCKUTAP
N/A None -0.469 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0] altera_internal_jtag~TCKUTAP
N/A None -0.469 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[1] altera_internal_jtag~TCKUTAP
N/A None -0.469 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[5] altera_internal_jtag~TCKUTAP
N/A None -0.558 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[0] altera_internal_jtag~TCKUTAP
N/A None -0.558 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[3] altera_internal_jtag~TCKUTAP
N/A None -0.558 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[1] altera_internal_jtag~TCKUTAP
N/A None -0.558 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[7] altera_internal_jtag~TCKUTAP
N/A None -0.558 ns altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[2] altera_internal_jtag~TCKUTAP
N/A None -0.606 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[6] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[7] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[8] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[9] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[10] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[11] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[12] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[13] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[14] altera_internal_jtag~TCKUTAP
N/A None -0.725 ns altera_internal_jtag~SHIFTUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[15] altera_internal_jtag~TCKUTAP
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[1] std_1s10:inst|sdram:the_sdram|za_data[1] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[0] std_1s10:inst|sdram:the_sdram|za_data[0] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[8] std_1s10:inst|sdram:the_sdram|za_data[8] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[9] std_1s10:inst|sdram:the_sdram|za_data[9] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[26] std_1s10:inst|sdram:the_sdram|za_data[26] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[10] std_1s10:inst|sdram:the_sdram|za_data[10] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[27] std_1s10:inst|sdram:the_sdram|za_data[27] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[28] std_1s10:inst|sdram:the_sdram|za_data[28] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[12] std_1s10:inst|sdram:the_sdram|za_data[12] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[29] std_1s10:inst|sdram:the_sdram|za_data[29] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[13] std_1s10:inst|sdram:the_sdram|za_data[13] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[30] std_1s10:inst|sdram:the_sdram|za_data[30] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[14] std_1s10:inst|sdram:the_sdram|za_data[14] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[25] std_1s10:inst|sdram:the_sdram|za_data[25] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[24] std_1s10:inst|sdram:the_sdram|za_data[24] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[21] std_1s10:inst|sdram:the_sdram|za_data[21] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[31] std_1s10:inst|sdram:the_sdram|za_data[31] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[15] std_1s10:inst|sdram:the_sdram|za_data[15] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[22] std_1s10:inst|sdram:the_sdram|za_data[22] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[20] std_1s10:inst|sdram:the_sdram|za_data[20] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[19] std_1s10:inst|sdram:the_sdram|za_data[19] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[18] std_1s10:inst|sdram:the_sdram|za_data[18] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[6] std_1s10:inst|sdram:the_sdram|za_data[6] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[5] std_1s10:inst|sdram:the_sdram|za_data[5] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[11] std_1s10:inst|sdram:the_sdram|za_data[11] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[16] std_1s10:inst|sdram:the_sdram|za_data[16] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[17] std_1s10:inst|sdram:the_sdram|za_data[17] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[4] std_1s10:inst|sdram:the_sdram|za_data[4] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[23] std_1s10:inst|sdram:the_sdram|za_data[23] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[7] std_1s10:inst|sdram:the_sdram|za_data[7] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[3] std_1s10:inst|sdram:the_sdram|za_data[3] PLD_CLOCKINPUT
N/A None -0.869 ns zs_dq_to_and_from_the_sdram[2] std_1s10:inst|sdram:the_sdram|za_data[2] PLD_CLOCKINPUT
N/A None -0.944 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0] altera_internal_jtag~TCKUTAP
N/A None -0.982 ns altera_internal_jtag std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[31] altera_internal_jtag~TCKUTAP
N/A None -1.006 ns ext_ram_bus_data[5] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[5] PLD_CLOCKINPUT
N/A None -1.006 ns ext_ram_bus_data[6] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[6] PLD_CLOCKINPUT
N/A None -1.006 ns ext_ram_bus_data[4] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[4] PLD_CLOCKINPUT
N/A None -1.006 ns ext_ram_bus_data[7] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[7] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[8] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[8] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[9] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[9] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[10] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[10] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[12] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[12] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[13] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[13] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[14] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[14] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[16] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[16] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[17] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[17] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[15] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[15] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[19] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[19] PLD_CLOCKINPUT
N/A None -1.007 ns ext_ram_bus_data[18] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[18] PLD_CLOCKINPUT
N/A None -1.034 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[0] altera_internal_jtag~TCKUTAP
N/A None -1.053 ns ext_ram_bus_data[26] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[26] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[27] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[27] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[11] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[11] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[28] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[28] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[29] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[29] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[30] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[30] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[25] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[25] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[1] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[1] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[0] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[0] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[24] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[24] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[21] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[21] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[31] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[31] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[22] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[22] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[20] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[20] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[23] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[23] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[3] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[3] PLD_CLOCKINPUT
N/A None -1.053 ns ext_ram_bus_data[2] std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|internal_incoming_ext_ram_bus_data[2] PLD_CLOCKINPUT
N/A None -1.268 ns altera_internal_jtag std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[9] altera_internal_jtag~TCKUTAP
N/A None -1.285 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[0] altera_internal_jtag~TCKUTAP
N/A None -1.285 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[3] altera_internal_jtag~TCKUTAP
N/A None -1.285 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[1] altera_internal_jtag~TCKUTAP
N/A None -1.285 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[7] altera_internal_jtag~TCKUTAP
N/A None -1.285 ns altera_internal_jtag sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_lhi:auto_generated|dffe1a[2] altera_internal_jtag~TCKUTAP
N/A None -2.957 ns altera_internal_jtag~RUNIDLEUSER std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|internal_monitor_go PLD_CLOCKINPUT
N/A None -5.702 ns bidir_port_to_and_from_the_reconfig_request_pio std_1s10:inst|reconfig_request_pio:the_reconfig_request_pio|readdata PLD_CLOCKINPUT
N/A None -5.870 ns in_port_to_the_button_pio[3] std_1s10:inst|button_pio:the_button_pio|d1_data_in[3] PLD_CLOCKINPUT
N/A None -5.874 ns in_port_to_the_button_pio[2] std_1s10:inst|button_pio:the_button_pio|d1_data_in[2] PLD_CLOCKINPUT
N/A None -5.893 ns in_port_to_the_button_pio[2] std_1s10:inst|button_pio:the_button_pio|readdata[2] PLD_CLOCKINPUT
N/A None -5.946 ns in_port_to_the_button_pio[1] std_1s10:inst|button_pio:the_button_pio|readdata[1] PLD_CLOCKINPUT
N/A None -5.947 ns in_port_to_the_button_pio[1] std_1s10:inst|button_pio:the_button_pio|d1_data_in[1] PLD_CLOCKINPUT
N/A None -5.985 ns in_port_to_the_button_pio[0] std_1s10:inst|button_pio:the_button_pio|d1_data_in[0] PLD_CLOCKINPUT
N/A None -5.987 ns in_port_to_the_button_pio[0] std_1s10:inst|button_pio:the_button_pio|readdata[0] PLD_CLOCKINPUT
N/A None -6.261 ns in_port_to_the_button_pio[3] std_1s10:inst|button_pio:the_button_pio|readdata[3] PLD_CLOCKINPUT
N/A None -6.919 ns irq_from_the_lan91c111 std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|d1_irq_from_the_lan91c111 PLD_CLOCKINPUT
N/A None -7.084 ns rxd_to_the_uart1 std_1s10:inst|uart1:the_uart1|uart1_rx:the_uart1_rx|d1_source_rxd PLD_CLOCKINPUT
N/A None -8.384 ns LCD_data_to_and_from_the_lcd_display[1] std_1s10:inst|cpu:the_cpu|d_readdata_d1[1] PLD_CLOCKINPUT
N/A None -8.567 ns LCD_data_to_and_from_the_lcd_display[7] std_1s10:inst|cpu:the_cpu|d_readdata_d1[7] PLD_CLOCKINPUT
N/A None -8.666 ns LCD_data_to_and_from_the_lcd_display[6] std_1s10:inst|cpu:the_cpu|d_readdata_d1[6] PLD_CLOCKINPUT
N/A None -8.925 ns LCD_data_to_and_from_the_lcd_display[3] std_1s10:inst|cpu:the_cpu|d_readdata_d1[3] PLD_CLOCKINPUT
N/A None -9.092 ns LCD_data_to_and_from_the_lcd_display[5] std_1s10:inst|cpu:the_cpu|d_readdata_d1[5] PLD_CLOCKINPUT
N/A None -9.722 ns LCD_data_to_and_from_the_lcd_display[4] std_1s10:inst|cpu:the_cpu|d_readdata_d1[4] PLD_CLOCKINPUT
N/A None -9.897 ns LCD_data_to_and_from_the_lcd_display[0] std_1s10:inst|cpu:the_cpu|d_readdata_d1[0] PLD_CLOCKINPUT
N/A None -10.667 ns LCD_data_to_and_from_the_lcd_display[2] std_1s10:inst|cpu:the_cpu|d_readdata_d1[2] PLD_CLOCKINPUT


Ignored Timing Assignments

Top
Option Setting From To Entity Name Help
Cut Timing Path On slave_address_d1[0] * clock_0 Node named slave_address_d1[0] removed during synthesis
Cut Timing Path On slave_address_d1[1] * clock_0 Node named slave_address_d1[1] removed during synthesis
Cut Timing Path On slave_address_d1[2] * clock_0 Node named slave_address_d1[2] removed during synthesis
Cut Timing Path On slave_address_d1[3] * clock_0 Node named slave_address_d1[3] removed during synthesis
Cut Timing Path On slave_byteenable_d1[0] * clock_0 Node named slave_byteenable_d1[0] removed during synthesis
Cut Timing Path On slave_byteenable_d1[1] * clock_0 Node named slave_byteenable_d1[1] removed during synthesis
Cut Timing Path On data_in_d1 * clock_0_bit_pipe Node named data_in_d1 removed during synthesis
MAX_DELAY 100.000 ns   std_1s10:inst|std_1s10_reset_sys_clk_domain_synch_module:std_1s10_reset_sys_clk_domain_synch|data_in_d1   Assignment is illegal for node and/or path
MAX_DELAY 100.000 ns   std_1s10:inst|std_1s10_reset_clk_domain_synch_module:std_1s10_reset_clk_domain_synch|data_in_d1   Assignment is illegal for node and/or path


Timing Analyzer Messages

Top
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 6.0 Build 176 04/19/2006 SJ Full Version
    Info: Processing started: Fri Apr 21 03:03:45 2006
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off standard -c standard --timing_analysis_only
Warning: Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "altera_internal_jtag~TCKUTAP" is an undefined clock
    Info: Assuming node "altera_internal_jtag~UPDATEUSER" is an undefined clock
Info: Found timing assignments -- calculating delays
Info: Slack time is 3.226 ns for clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" between source register "std_1s10:inst|cpu:the_cpu|ic_fill_tag[7]" and destination register "std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash"
    Info: Fmax is 59.62 MHz (period= 16.774 ns)
    Info: + Largest register to register requirement is 19.376 ns
        Info: + Setup relationship between source and destination is 20.000 ns
            Info: + Latch edge is 18.439 ns
                Info: Clock period of Destination clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" is 20.000 ns with  offset of -1.561 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
            Info: - Launch edge is -1.561 ns
                Info: Clock period of Source clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" is 20.000 ns with  offset of -1.561 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
        Info: + Largest clock skew is -0.364 ns
            Info: + Shortest clock path from clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" to destination register is 1.575 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_5; Fanout = 2943; CLK Node = 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
                Info: 2: + IC(1.469 ns) + CELL(0.106 ns) = 1.575 ns; Loc. = IOC_X19_Y31_N0; Fanout = 1; REG Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash'
                Info: Total cell delay = 0.106 ns ( 6.73 % )
                Info: Total interconnect delay = 1.469 ns ( 93.27 % )
            Info: - Longest clock path from clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" to source register is 1.939 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_5; Fanout = 2943; CLK Node = 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
                Info: 2: + IC(1.379 ns) + CELL(0.560 ns) = 1.939 ns; Loc. = LC_X35_Y14_N7; Fanout = 7; REG Node = 'std_1s10:inst|cpu:the_cpu|ic_fill_tag[7]'
                Info: Total cell delay = 0.560 ns ( 28.88 % )
                Info: Total interconnect delay = 1.379 ns ( 71.12 % )
        Info: - Micro clock to output delay of source is 0.176 ns
        Info: - Micro setup delay of destination is 0.084 ns
    Info: - Longest register to register delay is 16.150 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X35_Y14_N7; Fanout = 7; REG Node = 'std_1s10:inst|cpu:the_cpu|ic_fill_tag[7]'
        Info: 2: + IC(0.714 ns) + CELL(0.459 ns) = 1.173 ns; Loc. = LC_X36_Y14_N0; Fanout = 2; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|Equal3~113'
        Info: 3: + IC(0.340 ns) + CELL(0.332 ns) = 1.845 ns; Loc. = LC_X36_Y14_N2; Fanout = 3; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|Equal3~114'
        Info: 4: + IC(1.461 ns) + CELL(0.213 ns) = 3.519 ns; Loc. = LC_X40_Y15_N1; Fanout = 4; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|cpu_instruction_master_continuerequest~54'
        Info: 5: + IC(1.546 ns) + CELL(0.087 ns) = 5.152 ns; Loc. = LC_X34_Y13_N5; Fanout = 16; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|cpu_data_master_qualified_request_ext_flash_s1~146'
        Info: 6: + IC(1.632 ns) + CELL(0.344 ns) = 7.128 ns; Loc. = LC_X40_Y15_N7; Fanout = 2; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|Add2~361'
        Info: 7: + IC(0.000 ns) + CELL(0.060 ns) = 7.188 ns; Loc. = LC_X40_Y15_N8; Fanout = 2; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|Add2~369'
        Info: 8: + IC(0.000 ns) + CELL(0.219 ns) = 7.407 ns; Loc. = LC_X40_Y15_N9; Fanout = 6; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|Add2~373'
        Info: 9: + IC(0.000 ns) + CELL(0.493 ns) = 7.900 ns; Loc. = LC_X40_Y14_N2; Fanout = 6; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|Add2~366'
        Info: 10: + IC(1.140 ns) + CELL(0.087 ns) = 9.127 ns; Loc. = LC_X40_Y17_N3; Fanout = 18; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|cpu_instruction_master_granted_ext_flash_s1~38'
        Info: 11: + IC(1.406 ns) + CELL(0.087 ns) = 10.620 ns; Loc. = LC_X41_Y16_N3; Fanout = 2; COMB Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|p1_select_n_to_the_ext_flash~0'
        Info: 12: + IC(2.559 ns) + CELL(2.971 ns) = 16.150 ns; Loc. = IOC_X19_Y31_N0; Fanout = 1; REG Node = 'std_1s10:inst|ext_ram_bus_avalon_slave_arbitrator:the_ext_ram_bus_avalon_slave|select_n_to_the_ext_flash'
        Info: Total cell delay = 5.352 ns ( 33.14 % )
        Info: Total interconnect delay = 10.798 ns ( 66.86 % )
Info: No valid register-to-register data paths exist for clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_extclk0"
Info: Slack time is 15.453 ns for clock "PLD_CLOCKINPUT" between source register "std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2]" and destination register "std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0]"
    Info: Fmax is 219.93 MHz (period= 4.547 ns)
    Info: + Largest register to register requirement is 19.811 ns
        Info: + Setup relationship between source and destination is 20.000 ns
            Info: + Latch edge is 20.000 ns
                Info: Clock period of Destination clock "PLD_CLOCKINPUT" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
            Info: - Launch edge is 0.000 ns
                Info: Clock period of Source clock "PLD_CLOCKINPUT" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
        Info: + Largest clock skew is -0.003 ns
            Info: + Shortest clock path from clock "PLD_CLOCKINPUT" to destination register is 3.295 ns
                Info: 1: + IC(0.000 ns) + CELL(1.020 ns) = 1.020 ns; Loc. = PIN_K17; Fanout = 75; CLK Node = 'PLD_CLOCKINPUT'
                Info: 2: + IC(1.715 ns) + CELL(0.560 ns) = 3.295 ns; Loc. = LC_X48_Y21_N9; Fanout = 6; REG Node = 'std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0]'
                Info: Total cell delay = 1.580 ns ( 47.95 % )
                Info: Total interconnect delay = 1.715 ns ( 52.05 % )
            Info: - Longest clock path from clock "PLD_CLOCKINPUT" to source register is 3.298 ns
                Info: 1: + IC(0.000 ns) + CELL(1.020 ns) = 1.020 ns; Loc. = PIN_K17; Fanout = 75; CLK Node = 'PLD_CLOCKINPUT'
                Info: 2: + IC(1.718 ns) + CELL(0.560 ns) = 3.298 ns; Loc. = LC_X50_Y20_N3; Fanout = 6; REG Node = 'std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2]'
                Info: Total cell delay = 1.580 ns ( 47.91 % )
                Info: Total interconnect delay = 1.718 ns ( 52.09 % )
        Info: - Micro clock to output delay of source is 0.176 ns
        Info: - Micro setup delay of destination is 0.010 ns
    Info: - Longest register to register delay is 4.358 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X50_Y20_N3; Fanout = 6; REG Node = 'std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[2]'
        Info: 2: + IC(1.461 ns) + CELL(0.459 ns) = 1.920 ns; Loc. = LC_X48_Y21_N4; Fanout = 1; COMB Node = 'std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|Mux2~236'
        Info: 3: + IC(2.074 ns) + CELL(0.364 ns) = 4.358 ns; Loc. = LC_X48_Y21_N9; Fanout = 6; REG Node = 'std_1s10:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state[0]'
        Info: Total cell delay = 0.823 ns ( 18.88 % )
        Info: Total interconnect delay = 3.535 ns ( 81.12 % )
Info: Clock "altera_internal_jtag~TCKUTAP" has Internal fmax of 120.13 MHz between source register "std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0]" and destination register "sld_hub:sld_hub_inst|hub_tdo" (period= 8.324 ns)
    Info: + Longest register to register delay is 3.962 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X33_Y29_N5; Fanout = 2; REG Node = 'std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0]'
        Info: 2: + IC(1.393 ns) + CELL(0.459 ns) = 1.852 ns; Loc. = LC_X30_Y26_N0; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst|hub_tdo~544'
        Info: 3: + IC(0.343 ns) + CELL(0.332 ns) = 2.527 ns; Loc. = LC_X30_Y26_N1; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst|hub_tdo~545'
        Info: 4: + IC(0.852 ns) + CELL(0.583 ns) = 3.962 ns; Loc. = LC_X28_Y26_N9; Fanout = 1; REG Node = 'sld_hub:sld_hub_inst|hub_tdo'
        Info: Total cell delay = 1.374 ns ( 34.68 % )
        Info: Total interconnect delay = 2.588 ns ( 65.32 % )
    Info: - Smallest clock skew is -0.014 ns
        Info: + Shortest clock path from clock "altera_internal_jtag~TCKUTAP" to destination register is 3.982 ns
            Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = ELA_X0_Y15_N0; Fanout = 153; CLK Node = 'altera_internal_jtag~TCKUTAP'
            Info: 2: + IC(3.422 ns) + CELL(0.560 ns) = 3.982 ns; Loc. = LC_X28_Y26_N9; Fanout = 1; REG Node = 'sld_hub:sld_hub_inst|hub_tdo'
            Info: Total cell delay = 0.560 ns ( 14.06 % )
            Info: Total interconnect delay = 3.422 ns ( 85.94 % )
        Info: - Longest clock path from clock "altera_internal_jtag~TCKUTAP" to source register is 3.996 ns
            Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = ELA_X0_Y15_N0; Fanout = 153; CLK Node = 'altera_internal_jtag~TCKUTAP'
            Info: 2: + IC(3.436 ns) + CELL(0.560 ns) = 3.996 ns; Loc. = LC_X33_Y29_N5; Fanout = 2; REG Node = 'std_1s10:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[0]'
            Info: Total cell delay = 0.560 ns ( 14.01 % )
            Info: Total interconnect delay = 3.436 ns ( 85.99 % )
    Info: + Micro clock to output delay of source is 0.176 ns
    Info: + Micro setup delay of destination is 0.010 ns
    Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two
Info: No valid register-to-register data paths exist for clock "altera_internal_jtag~UPDATEUSER"
Info: Minimum slack time is 528 ps for clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" between source register "std_1s10:inst|jtag_uart:the_jtag_uart|r_val" and destination register "std_1s10:inst|jtag_uart:the_jtag_uart|r_val"
    Info: + Shortest register to register delay is 0.452 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X48_Y17_N5; Fanout = 4; REG Node = 'std_1s10:inst|jtag_uart:the_jtag_uart|r_val'
        Info: 2: + IC(0.000 ns) + CELL(0.452 ns) = 0.452 ns; Loc. = LC_X48_Y17_N5; Fanout = 4; REG Node = 'std_1s10:inst|jtag_uart:the_jtag_uart|r_val'
        Info: Total cell delay = 0.452 ns ( 100.00 % )
    Info: - Smallest register to register requirement is -0.076 ns
        Info: + Hold relationship between source and destination is 0.000 ns
            Info: + Latch edge is -1.561 ns
                Info: Clock period of Destination clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" is 20.000 ns with  offset of -1.561 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
                Info: Multicycle Hold factor for Destination register is 1
            Info: - Launch edge is -1.561 ns
                Info: Clock period of Source clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" is 20.000 ns with  offset of -1.561 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
                Info: Multicycle Hold factor for Source register is 1
        Info: + Smallest clock skew is 0.000 ns
            Info: + Longest clock path from clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" to destination register is 1.961 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_5; Fanout = 2943; CLK Node = 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
                Info: 2: + IC(1.401 ns) + CELL(0.560 ns) = 1.961 ns; Loc. = LC_X48_Y17_N5; Fanout = 4; REG Node = 'std_1s10:inst|jtag_uart:the_jtag_uart|r_val'
                Info: Total cell delay = 0.560 ns ( 28.56 % )
                Info: Total interconnect delay = 1.401 ns ( 71.44 % )
            Info: - Shortest clock path from clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" to source register is 1.961 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_5; Fanout = 2943; CLK Node = 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
                Info: 2: + IC(1.401 ns) + CELL(0.560 ns) = 1.961 ns; Loc. = LC_X48_Y17_N5; Fanout = 4; REG Node = 'std_1s10:inst|jtag_uart:the_jtag_uart|r_val'
                Info: Total cell delay = 0.560 ns ( 28.56 % )
                Info: Total interconnect delay = 1.401 ns ( 71.44 % )
        Info: - Micro clock to output delay of source is 0.176 ns
        Info: + Micro hold delay of destination is 0.100 ns
Info: Minimum slack time is 604 ps for clock "PLD_CLOCKINPUT" between source register "std_1s10:inst|clock_0:the_clock_0|master_writedata[12]" and destination register "std_1s10:inst|pll:the_pll|control_reg_out[12]"
    Info: + Shortest register to register delay is 0.528 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X51_Y19_N3; Fanout = 1; REG Node = 'std_1s10:inst|clock_0:the_clock_0|master_writedata[12]'
        Info: 2: + IC(0.438 ns) + CELL(0.090 ns) = 0.528 ns; Loc. = LC_X51_Y19_N2; Fanout = 1; REG Node = 'std_1s10:inst|pll:the_pll|control_reg_out[12]'
        Info: Total cell delay = 0.090 ns ( 17.05 % )
        Info: Total interconnect delay = 0.438 ns ( 82.95 % )
    Info: - Smallest register to register requirement is -0.076 ns
        Info: + Hold relationship between source and destination is 0.000 ns
            Info: + Latch edge is 0.000 ns
                Info: Clock period of Destination clock "PLD_CLOCKINPUT" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
                Info: Multicycle Hold factor for Destination register is 1
            Info: - Launch edge is 0.000 ns
                Info: Clock period of Source clock "PLD_CLOCKINPUT" is 20.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
                Info: Multicycle Hold factor for Source register is 1
        Info: + Smallest clock skew is 0.000 ns
            Info: + Longest clock path from clock "PLD_CLOCKINPUT" to destination register is 3.440 ns
                Info: 1: + IC(0.000 ns) + CELL(1.020 ns) = 1.020 ns; Loc. = PIN_K17; Fanout = 75; CLK Node = 'PLD_CLOCKINPUT'
                Info: 2: + IC(1.860 ns) + CELL(0.560 ns) = 3.440 ns; Loc. = LC_X51_Y19_N2; Fanout = 1; REG Node = 'std_1s10:inst|pll:the_pll|control_reg_out[12]'
                Info: Total cell delay = 1.580 ns ( 45.93 % )
                Info: Total interconnect delay = 1.860 ns ( 54.07 % )
            Info: - Shortest clock path from clock "PLD_CLOCKINPUT" to source register is 3.440 ns
                Info: 1: + IC(0.000 ns) + CELL(1.020 ns) = 1.020 ns; Loc. = PIN_K17; Fanout = 75; CLK Node = 'PLD_CLOCKINPUT'
                Info: 2: + IC(1.860 ns) + CELL(0.560 ns) = 3.440 ns; Loc. = LC_X51_Y19_N3; Fanout = 1; REG Node = 'std_1s10:inst|clock_0:the_clock_0|master_writedata[12]'
                Info: Total cell delay = 1.580 ns ( 45.93 % )
                Info: Total interconnect delay = 1.860 ns ( 54.07 % )
        Info: - Micro clock to output delay of source is 0.176 ns
        Info: + Micro hold delay of destination is 0.100 ns
Info: tsu for register "std_1s10:inst|cpu:the_cpu|d_readdata_d1[2]" (data pin = "LCD_data_to_and_from_the_lcd_display[2]", clock pin = "PLD_CLOCKINPUT") is 10.777 ns
    Info: + Longest pin to register delay is 11.035 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_L8; Fanout = 1; PIN Node = 'LCD_data_to_and_from_the_lcd_display[2]'
        Info: 2: + IC(0.000 ns) + CELL(1.295 ns) = 1.295 ns; Loc. = IOC_X53_Y29_N1; Fanout = 1; COMB Node = 'LCD_data_to_and_from_the_lcd_display~5'
        Info: 3: + IC(4.888 ns) + CELL(0.087 ns) = 6.270 ns; Loc. = LC_X48_Y13_N5; Fanout = 1; COMB Node = 'std_1s10:inst|cpu_data_master_arbitrator:the_cpu_data_master|cpu_data_master_readdata[2]~4830'
        Info: 4: + IC(0.139 ns) + CELL(0.087 ns) = 6.496 ns; Loc. = LC_X48_Y13_N6; Fanout = 1; COMB Node = 'std_1s10:inst|cpu_data_master_arbitrator:the_cpu_data_master|cpu_data_master_readdata[2]~4831'
        Info: 5: + IC(1.328 ns) + CELL(0.213 ns) = 8.037 ns; Loc. = LC_X46_Y12_N5; Fanout = 1; COMB Node = 'std_1s10:inst|cpu_data_master_arbitrator:the_cpu_data_master|cpu_data_master_readdata[2]~4837'
        Info: 6: + IC(2.415 ns) + CELL(0.583 ns) = 11.035 ns; Loc. = LC_X40_Y20_N8; Fanout = 1; REG Node = 'std_1s10:inst|cpu:the_cpu|d_readdata_d1[2]'
        Info: Total cell delay = 2.265 ns ( 20.53 % )
        Info: Total interconnect delay = 8.770 ns ( 79.47 % )
    Info: + Micro setup delay of destination is 0.010 ns
    Info: - Offset between input clock "PLD_CLOCKINPUT" and output clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" is -1.561 ns
    Info: - Shortest clock path from clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" to destination register is 1.829 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_5; Fanout = 2943; CLK Node = 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
        Info: 2: + IC(1.269 ns) + CELL(0.560 ns) = 1.829 ns; Loc. = LC_X40_Y20_N8; Fanout = 1; REG Node = 'std_1s10:inst|cpu:the_cpu|d_readdata_d1[2]'
        Info: Total cell delay = 0.560 ns ( 30.62 % )
        Info: Total interconnect delay = 1.269 ns ( 69.38 % )
Info: tco from clock "PLD_CLOCKINPUT" to destination pin "LCD_E_from_the_lcd_display" through register "std_1s10:inst|cpu:the_cpu|M_alu_result[19]" is 12.716 ns
    Info: + Offset between input clock "PLD_CLOCKINPUT" and output clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" is -1.561 ns
    Info: + Longest clock path from clock "std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0" to source register is 1.882 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_5; Fanout = 2943; CLK Node = 'std_1s10:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk0'
        Info: 2: + IC(1.322 ns) + CELL(0.560 ns) = 1.882 ns; Loc. = LC_X22_Y20_N7; Fanout = 5; REG Node = 'std_1s10:inst|cpu:the_cpu|M_alu_result[19]'
        Info: Total cell delay = 0.560 ns ( 29.76 % )
        Info: Total interconnect delay = 1.322 ns ( 70.24 % )
    Info: + Micro clock to output delay of source is 0.176 ns
    Info: + Longest register to pin delay is 12.219 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X22_Y20_N7; Fanout = 5; REG Node = 'std_1s10:inst|cpu:the_cpu|M_alu_result[19]'
        Info: 2: + IC(1.952 ns) + CELL(0.087 ns) = 2.039 ns; Loc. = LC_X36_Y13_N3; Fanout = 3; COMB Node = 'std_1s10:inst|onchip_ram_64_kbytes_s1_arbitrator:the_onchip_ram_64_kbytes_s1|cpu_data_master_requests_onchip_ram_64_kbytes_s1~297'
        Info: 3: + IC(1.412 ns) + CELL(0.332 ns) = 3.783 ns; Loc. = LC_X39_Y12_N9; Fanout = 11; COMB Node = 'std_1s10:inst|cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_data_master_requests_cpu_jtag_debug_module~307'
        Info: 4: + IC(0.989 ns) + CELL(0.213 ns) = 4.985 ns; Loc. = LC_X40_Y12_N0; Fanout = 14; COMB Node = 'std_1s10:inst|button_pio_s1_arbitrator:the_button_pio_s1|cpu_data_master_requests_button_pio_s1~52'
        Info: 5: + IC(1.661 ns) + CELL(0.459 ns) = 7.105 ns; Loc. = LC_X40_Y18_N6; Fanout = 2; COMB Node = 'std_1s10:inst|lcd_display_control_slave_arbitrator:the_lcd_display_control_slave|lcd_display_control_slave_in_a_write_cycle~36'
        Info: 6: + IC(0.359 ns) + CELL(0.332 ns) = 7.796 ns; Loc. = LC_X40_Y18_N2; Fanout = 1; COMB Node = 'std_1s10:inst|lcd_display:the_lcd_display|LCD_E~444'
        Info: 7: + IC(1.928 ns) + CELL(2.495 ns) = 12.219 ns; Loc. = PIN_K3; Fanout = 0; PIN Node = 'LCD_E_from_the_lcd_display'
        Info: Total cell delay = 3.918 ns ( 32.06 % )
        Info: Total interconnect delay = 8.301 ns ( 67.94 % )
Info: Longest tpd from source pin "altera_internal_jtag~TDO" to destination pin "altera_reserved_tdo" is 2.504 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = ELA_X0_Y15_N0; Fanout = 1; PIN Node = 'altera_internal_jtag~TDO'
    Info: 2: + IC(0.000 ns) + CELL(2.504 ns) = 2.504 ns; Loc. = PIN_H13; Fanout = 0; PIN Node = 'altera_reserved_tdo'
    Info: Total cell delay = 2.504 ns ( 100.00 % )
Info: th for register "std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7]" (data pin = "altera_internal_jtag", clock pin = "altera_internal_jtag~TCKUTAP") is 1.617 ns
    Info: + Longest clock path from clock "altera_internal_jtag~TCKUTAP" to destination register is 4.009 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = ELA_X0_Y15_N0; Fanout = 153; CLK Node = 'altera_internal_jtag~TCKUTAP'
        Info: 2: + IC(3.449 ns) + CELL(0.560 ns) = 4.009 ns; Loc. = LC_X36_Y23_N3; Fanout = 1; REG Node = 'std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7]'
        Info: Total cell delay = 0.560 ns ( 13.97 % )
        Info: Total interconnect delay = 3.449 ns ( 86.03 % )
    Info: + Micro hold delay of destination is 0.100 ns
    Info: - Shortest pin to register delay is 2.492 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = ELA_X0_Y15_N0; Fanout = 18; PIN Node = 'altera_internal_jtag'
        Info: 2: + IC(2.257 ns) + CELL(0.235 ns) = 2.492 ns; Loc. = LC_X36_Y23_N3; Fanout = 1; REG Node = 'std_1s10:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7]'
        Info: Total cell delay = 0.235 ns ( 9.43 % )
        Info: Total interconnect delay = 2.257 ns ( 90.57 % )
Info: All timing requirements were met. See Report window for more details.
Warning: Found invalid timing assignments -- see Ignored Timing Assignments report for details
Info: Quartus II Timing Analyzer was successful. 0 errors, 3 warnings
    Info: Processing ended: Fri Apr 21 03:03:55 2006
    Info: Elapsed time: 00:00:10

Top