Updated: septembre 20, 2011

Welcome to the MicroBlaze PREEMPT-RT Project

 

 

Hardware Requirements

You need a board with an Xilinx FPGA circuit and a system (JTAG) for programming it. We suggest to use:

• Xilinx boards first
• Other boards from a third party

Software Requirements

• You need the cross GNU C compiler for MicroBlaze
• You need the Linux distribution for MicroBlaze
• You need the PREEMPT-RT extension

Hardware Links

• Xilinx site
• Xilinx MicroBlaze Processor page
• Xilinx User Guides and Manuals page

Software Links

Main links:

• GNU C compiler for MicroBlaze. Local download
• Linux distribution for MicroBlaze
• PREEMPT-RT port for MicroBlaze

Other links:

• The PREEMPT-RT project
• The Xilinx community wiki
• The RTEL4I project

Howtos

This is a quick and dirty tutorial:

You must have a design for MicroBlaze with MMU enabled. You must verify that you can boot a standard Linux kernel first on your board. Please follow this documentation.

Hardware requirements:

You use BSB (Base System Builder) tool from XPS. You must in your SoPC builder design add a 32-bit xps_timer timer with the 2 timers enabled (one used as clock source and one used as clock event for high resolution timer support).

You must have finally 1 xps_timer timer with its 2 timers enabled:

• A 32-bit timer (clock event fot PREEMPT-RT).
• A 32-bit timer (clock source for PREEMPT-RT).

Software requirements:

1. Download the Linux distribution for MicroBlaze (if not):

$ cd
$ git clone git://git.xilinx.com/linux-2.6-xlnx.git
$ ln -s linux-2.6-xlnx mb-linux

We suppose now that $mb_linux is the path to the mb-linux directory.

2. Synchronize the Linux kernel version with the PREEMPT-RT patch version:

$ cd $mb_linux
$ git pull
$ git checkout -b v2.6.31 xilinx_v2.6.31

3. Apply the general PREEMPT-RT patch:

$ cd ..
$ wget http://www.kernel.org/pub/linux/kernel/projects/rt/patch-2.6.31.12-rt21.bz2
$ cd $mb_linux
$ bzcat ../patch-2.6.31.12-rt21.bz2 | patch -p

Don't worry about the following rejected files:

./Makefile.rej
./kernel/perf_counter.c.rej
./kernel/futex.c.rej
./kernel/time/clockevents.c.rej

4.  Apply the particular PREEMPT-RT patch for MicroBlaze

$ wget http://www.enseirb.fr/~kadionik/microblaze-preempt-rt/patchs/preempt-rt-2.6.31.12-rt21-microblaze-1.0-00.patch
$ patch -p1 <../preempt-rt-2.6.31.12-rt21-microblaze-1.0-00.patch

5. Configure the kernel to use the PREEMPT-RT preemption mode and download finally the image into your board.

Ready to use:

• Latest ready to use PREEMPT-RT Linux kernel for MicroBlaze

Guides

• Guide d'utilisation de PREEMPT-RT sur processeur softcore MicroBlaze. Version 1.0. French version

Limitations

This initial port gives some extra latency on file creation up to 100 ms. Is was easily detected with a dd stressing.

This port is surely perfectible. If you make improvements, you may contact us...

Latency measurement

Latency can be measured with classical tools provided through cross compilation. The principe is to generate a periodic thread and to measure difference between the effectiv period and the theorical period that defines latency.

• cyclictest : latency is measured on a period of 10000 µs with a thread of the maximal priority 99:
  • # cyclictest -n -p 99 -i 10000

For stressing the system, we have used:

• ping flooding
  • # ping -f @IP
• stress tool:
  • # stress -c 50 -i 50 &

The realtime group scheduling must be inhibited:

# echo -1 > /proc/sys/kernel/sched_rt_runtime_us

XILINX Boards tested and in use with PREEMPT-RT

For measuring latencies, boards are stressed by stress tool (# stress -c 50 -i 50 &) and ping flooding (# ping -f @IP).

• (1) # cyclictest -n -p 99 -i 1000

Downloads

The following MicroBlaze SoPC designs for PREEMPT-RT are given as an example without any guaranty and AS IS. You must purchase Xilinx tools for generating files for programming your Xilinx FPGA of your board.

• PREEMPT-RT design for Xilinx ML403 board. Based on BSB reference design from XPS. For ISE >=11.4
• PREEMPT-RT design for Xilinx ML507 board. Based on BSB reference design from XPS. For ISE >=11.4