Updated: septembre 20, 2011
This page collects all informations on how to use PREEMPT-RT soft realtime extention with the Xilinx MicroBlaze softcore processor. We have made an effort to propose this new port. With codesign, a new difficulty appears with flexibility during codesign generation. This page proposes to give important informations specially to this important part. Our wish is that your experience on PREEMPT-RT for MicroBlaze will be successful!
This work has been done for the RTEL4I project with help of the System@TIC ICT cluster.
You need a board with an Xilinx FPGA circuit and a system (JTAG) for programming it. We suggest to use:
This is a quick and dirty tutorial:
You must have a design for MicroBlaze with MMU enabled. You must verify that you can boot a standard Linux kernel first on your board. Please follow this documentation.
You use BSB (Base System Builder) tool from XPS. You must in your SoPC builder design add a 32-bit xps_timer timer with the 2 timers enabled (one used as clock source and one used as clock event for high resolution timer support).
You must have finally 1 xps_timer timer with its 2 timers enabled:
1. Download the Linux distribution for MicroBlaze (if not):
$ cd $ git clone git://git.xilinx.com/linux-2.6-xlnx.git $ ln -s linux-2.6-xlnx mb-linux
We suppose now that $mb_linux is the path to the mb-linux
We suppose now that $mb_linux is the path to the mb-linux directory.
the Linux kernel version with the PREEMPT-RT patch version:
2. Synchronize the Linux kernel version with the PREEMPT-RT patch version:
$ cd $mb_linux $ git pull $ git checkout -b v2.6.31 xilinx_v2.6.31
3. Apply the general PREEMPT-RT patch:
$ cd .. $ wget http://www.kernel.org/pub/linux/kernel/projects/rt/patch-184.108.40.206-rt21.bz2 $ cd $mb_linux $ bzcat ../patch-220.127.116.11-rt21.bz2 | patch -p
worry about the following rejected files:
Don't worry about the following rejected files:
./Makefile.rej ./kernel/perf_counter.c.rej ./kernel/futex.c.rej ./kernel/time/clockevents.c.rej
the particular PREEMPT-RT patch for MicroBlaze
4. Apply the particular PREEMPT-RT patch for MicroBlaze
$ wget http://www.enseirb.fr/~kadionik/microblaze-preempt-rt/patchs/preempt-rt-18.104.22.168-rt21-microblaze-1.0-00.patch $ patch -p1 <../preempt-rt-22.214.171.124-rt21-microblaze-1.0-00.patch
5. Configure the kernel to use the PREEMPT-RT preemption mode and download finally the image into your board.
This initial port gives some extra latency on file creation up to 100 ms. Is was easily detected with a dd stressing.
This port is surely perfectible. If you make improvements, you may contact us...
Latency can be measured with classical tools provided through cross compilation. The principe is to generate a periodic thread and to measure difference between the effectiv period and the theorical period that defines latency.
For stressing the system, we have used:
The realtime group scheduling must be inhibited:
# echo -1 > /proc/sys/kernel/sched_rt_runtime_us
For measuring latencies, boards are stressed by stress tool (# stress -c 50 -i 50 &) and ping flooding (# ping -f @IP).
|Board||Linux kernel version||PREEMPT-RT version||Max latency (1)||MicroBlaze Frequency||Contact||Comments||PREEMPT-RT Design|
|Xilinx ML403 board||126.96.36.199||188.8.131.52-rt21||
|100 MHz||Patrice Kadionik||05/09/2010 trace||From BSB tool in XPS|
|Xilinx ML507 board||184.108.40.206||220.127.116.11-rt21||
|100 MHz||Patrice Kadionik||From BSB tool in XPS|
The following MicroBlaze SoPC designs for PREEMPT-RT are given as an example without any guaranty and AS IS. You must purchase Xilinx tools for generating files for programming your Xilinx FPGA of your board.